#include <mega162.h> 
#include <delay.h>

#define UDRE0 5
#define RXC0 7
#define TXC0 6 
#define RXC1 7
#define TXC1 6
#define UDRE1 5

#define DATA_REGISTER_EMPTY0 (1<<UDRE0)
#define RX_COMPLETE0 (1<<RXC0)
#define TX_COMPLETE0 (1<<TXC0)     
#define DATA_REGISTER_EMPTY1 (1<<UDRE1)
#define RX_COMPLETE1 (1<<RXC1)
#define TX_COMPLETE1 (1<<TXC1)  

unsigned char tb0;
unsigned char tb1;

// -------------------------------------------------

void USART0_TRANSMIT ( void  )  
 {
  UCSR0B=0x08;

  while(!(UCSR0A & DATA_REGISTER_EMPTY0));
  UDR0=tb0; 
  while(!(UCSR0A & TX_COMPLETE0));
  PORTD.2=0;
  UCSR0B=0x10;

  }; 
 
// -------------------------------------------------


void USART1_TRANSMIT ( void  )  
 { 
  UCSR1B=0x08;

  while(!(UCSR1A & DATA_REGISTER_EMPTY1));
  UDR1=tb1; 
  while(!(UCSR1A & TX_COMPLETE1));
  PORTB.0=0;
  UCSR1B=0x10;

 };

// -------------------------------------------------

void USART_Receive( void ) 
{  
  while(((UCSR0A & RX_COMPLETE0)|(UCSR1A & RX_COMPLETE1))==0); 
      
      if (UCSR0A & RX_COMPLETE0) 
          {
           tb1=UDR0;
           PORTB.0=1;
           USART1_TRANSMIT ();
           UCSR1A=TX_COMPLETE1;
          }
      if (UCSR1A & RX_COMPLETE1) 
          {
           tb0=UDR1;
           PORTD.2=1;
           USART0_TRANSMIT (); 
           UCSR0A=TX_COMPLETE1;
          }   

};      

// -------------------------------------------------


#include <stdio.h>

void main(void)
{    

#pragma optsize-
CLKPR=0x80;
CLKPR=0x00;
#ifdef _OPTIMIZE_SIZE_
#pragma optsize+
#endif

PORTB=0x00;
DDRB=0x03;

PORTD=0x00;
DDRD=0x36;

UCSR0A=0x00;
UCSR0B=0x18;
UCSR0C=0x86;
UBRR0L=0x00;

UCSR1A=0x00;
UCSR1B=0x18;
UCSR1C=0x86;
UBRR1L=0x00;

ACSR=0x80;    

PORTB.1=0x01; 
delay_ms(300);  
PORTB.1=0x00;
delay_ms(300); 
PORTD.5=0x01;
delay_ms(300); 
PORTD.5=0x00;

while (1)     
      
      {
       
       USART_Receive ();

      };
}