;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Device          : GPS + RTC Dot Matrix Clock and Thermometer                   ;
; Applications    : Where to clock for Home, Office, Mart, Etc.                  ;
; Program         : Min-ju, Lee                                                  ;
; web mail        : miziconf@miziconf.co.kr                                      ;
; web page        : www.it-style.kr                                              ;
; web page        : www.lebsoft.co.kr                                            ;
; H/W version     : v 2.xx (2010/07/26)                                          ;
; S/W version     : v 4.63 (2011/04/17)                                          ;
; V 1.00 released : 2010/01/25                                                   ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

.equ	hw_model	= 0

.include "m16def.inc"

.def	line_select	= r2	; do not use global register
.def	zero	= r3	; do not use global register
.def	key_flag	= r4
.def	remote_count	= r5
.def	remote_data_old	= r6
.def	ir_delay_count	= r7
.def	ir_code_buff1	= r8
.def	ir_code_buff2	= r9
.def	ir_code_buff3	= r10
.def	ir_code_buff4	= r11
.def	menu_select = r12
.def	menu_position	= r13
.def	adc_count	= r14
.def	quick_memo_flag	= r15
.def	tmp	= r16
.def	tmp2	= r17
.def	tmp3	= r18
.def	tmp4	= r19
.def	key_count	= r20
.def	loop_count	= r21
.def	remote_data	= r22


.equ	data_red	= PB1
.equ	data_green	= PB0
.equ	clock	= PA5
.equ	out_enable	= PB3
.equ	latch	= PA4
.equ	statu_led	= PA6
.equ	speaker	=	PD4

.if	hw_model	== 0
.equ	key_esc	= 0b01110000
.equ	key_dec	= 0b10110000
.equ	key_inc	= 0b11100000
.equ	key_ent	= 0b11010000
.equ	key_no	= 0b11110000
.equ	key_game_drop	= key_ent&key_dec
.equ	key_game_change	= key_ent&key_inc
.equ	key_game_pause	= key_dec&key_inc
.equ	key_fil	= key_no
.elif	hw_model	== 1
.equ	key_esc	= 0b10000000
.equ	key_dec	= 0b01000000
.equ	key_inc	= 0b00010000
.equ	key_ent	= 0b00100000
.equ	key_no	= 0b00000000
.equ	key_game_drop	= key_ent|key_dec
.equ	key_game_change	= key_ent|key_inc
.equ	key_game_pause	= key_dec|key_inc
.equ	key_fil	= 0b11110000
.equ	reset_rfmodule	= PC2
.equ	reset_touch	= PC3
.endif

.equ	ir_esc	= 0x0f
.equ	ir_dec	= 0x0b
.equ	ir_inc	= 0x0a
.equ	ir_ent	= 0x0e
.equ	ir_left	= 0x0c
.equ	ir_right	= 0x0d

.equ	timer1_interrupt_remote_mode	= (1<<TOIE0)|(0<<OCIE1A)|(0<<OCIE1B)|(1<<TOIE1)|(1<<TICIE1)
.equ	timer1_control1_remote_mode	= (0<<COM1A1)|(0<<COM1A0)|(0<<COM1B1)|(0<<COM1B0)|(0<<FOC1A)|(0<<FOC1B)|(0<<WGM11)|(0<<WGM10)
.equ	timer1_control2_remote_mode	= (1<<ICNC1)|(0<<ICES1)|(0<<WGM13)|(0<<WGM12)|(0<<CS12)|(1<<CS11)|(0<<CS10)	; falling / normal / 16MHz/8

.equ	timer1_interrupt_speaker_mode	= (1<<TOIE0)|(0<<OCIE1A)|(0<<OCIE1B)|(0<<TOIE1)|(1<<TICIE1)
.equ	timer1_control1_speaker_mode	= (0<<COM1A1)|(0<<COM1A0)|(0<<COM1B1)|(0<<COM1B0)|(0<<FOC1A)|(0<<FOC1B)|(0<<WGM11)|(0<<WGM10)
.equ	timer1_control2_speaker_mode	= (1<<ICNC1)|(0<<ICES1)|(0<<WGM13)|(0<<WGM12)|(1<<CS12)|(0<<CS11)|(1<<CS10)

.equ	timer1_interrupt_normal_mode	= (1<<TOIE0)|(1<<OCIE1A)|(0<<OCIE1B)|(0<<TOIE1)|(1<<TICIE1)
.equ	timer1_control1_normal_mode	= (0<<COM1A1)|(0<<COM1A0)|(0<<COM1B1)|(0<<COM1B0)|(0<<FOC1A)|(0<<FOC1B)|(0<<WGM11)|(0<<WGM10)
.equ	timer1_control2_normal_mode	= (1<<ICNC1)|(0<<ICES1)|(0<<WGM13)|(1<<WGM12)|(1<<CS12)|(0<<CS11)|(0<<CS10)	; falling / ctc / 16MHz/256

.equ	alarm_off = 0
.equ	alarm_once	= 1
.equ	alarm_everyday	= 2
.equ	alarm_weekday	= 3
.equ	alarm_weekend	= 4

.equ	esave_count	= 220

.macro	ldiw
	ldi	@0L,low(@1)
	ldi	@0H,high(@1)
.endm
.macro	pusw
	push	@0L
	push	@0H
.endm
.macro	popw
	pop	@0H
	pop	@0L
.endm
.macro	outi
	ldi	tmp,@1
	out	@0,tmp
.endm
.macro	touch_off
.if	hw_model	== 1
	cbi	PORTC,reset_touch
.endif
.endm
.macro	touch_on
.if	hw_model	== 1
	sbi	PORTC,reset_touch
.endif
.endm
.macro	rf_off
.if	hw_model	== 1
	cbi	PORTC,reset_rfmodule
.endif
.endm
.macro	rf_on
.if	hw_model	== 1
	sbi	PORTC,reset_rfmodule
.endif
.endm
.macro	touch_reset
.if	hw_model	== 1
	cbi	PORTC,reset_touch
	push	tmp
	ldi	tmp,1
	call	wait_ms
	pop	tmp
	sbi	PORTC,reset_touch
.endif
.endm

.if	hw_model	> 1
	.error	"Reselect H/W model."
.endif

.dseg
ram_data_green_upper:	.byte	128
ram_data_green:	.byte	128
ram_data_green_lower:	.byte	128
.equ	ram_game_tetris_block_buff	=	ram_data_green_lower
ram_data_red_upper:	.byte	128
ram_data_red:	.byte	128
ram_data_red_lower:	.byte	128
.equ	ram_game_tetris_ground_buff	=	ram_data_red_lower
ram_data_green_buffer:	.byte	8
ram_data_red_buffer:	.byte	8
ram_uart_rx_buffer:	.byte	19
	.equ	gps_rx_count	= 15
	.equ	gps_data_store_addr	= 16
	.equ	gps_format_match	= 17
	.equ	gps_retention	= 18
ram_brightness_mode:	.byte	1
ms_count:	.byte	2	; menu out count
ram_process_buffer:	.byte	8
menu_value:	.byte	16
.equ	week_day	= menu_value;	.byte	1	; ¾Ë¶÷ ÁÖ¸»/ÁÖÁß ÂüÁ¶½Ã È°¿ë
.equ	game_buff	= menu_value
	.equ	game_tetris_running_minute	=	0
	.equ	game_tetris_running_second	=	1
	.equ	game_tetris_this_block	=	2
	.equ	game_tetris_next_block	=	3
	.equ	game_tetris_block_rotate	= 4
	.equ	game_tetris_block_fallingpos	= 5
adc_buff:	.byte	3
.equ	adc_buff_byte3	= 0
.equ	adc_buff_high	= 1
.equ	adc_buff_low	= 2
esave_count_buff:	.byte	1
menu_sub_display_msg_src_cnt:	.byte	1

/*
NoteIdx:
	.byte	1		; Note rotation index
	.equ	N_NOTE	= 6
Notes:
	.byte	(2+3+1+1+1+1)*N_NOTE
	.equ	ns_freq	= 0		;Angular Speed
	.equ	ns_rptr	= 2		;Wave table read pointer (16.8 fraction)
	.equ	ns_lvl	= 5		;Level
	.equ	ns_wrap	= 6		;Loop Flag
	.equ	ns_loop	= 7		;Loop Count
	.equ	ns_lp	= 8		;Level Pointer
	.equ	nsize	= 9		;size of this structure
*/
.eseg
.org	0x0100
rom_brightness_mode:	.byte	1	; 5|0x80
rom_brightness_set_night:	.byte	1 ; 7
rom_brightness_set_day:	.byte	1 ; 7
rom_brightness_set_adc:	.byte	1	; ~255
rom_brightness_set_manual:	.byte	1 ; 7
rom_set_font:	.byte	1	; 3
rom_set_effect:	.byte	1	; 3
rom_set_effect_speed:	.byte	1	; 2
rom_disp_mode:	.byte	5; 0b00000111
rom_alarm_mode:	.byte	1	; 4
rom_alarm_minute:	.byte	1	; 0x59
rom_alarm_hour:	.byte	1	; 0x12
rom_chime_mode:	.byte	1	; 2
rom_chime_type:	.byte	1	; 1
rom_dday_message:	.byte	10	; 0x7f
rom_dday_date_day:	.byte	1 ; 0x31
rom_dday_date_month:	.byte	1	; 0x12
rom_dday_date_year:	.byte	1	; 0x99
rom_quick_memo:	.byte	10	; 0x39
rom_remocon_mode:	.byte	1	; 3


.cseg
	.org	0x0000
	jmp	reset ; Reset Handler
	reti	nop	; IRQ0 Handler
	reti	nop	; IRQ1 Handler
	reti	nop	; Timer2 Compare Handler
	reti	nop	; Timer2 Overflow Handler
	rjmp	receive	nop	; Timer1 Capture Handler
	reti	nop	; Timer1 CompareA Handler
	reti	nop	; Timer1 CompareB Handler
	rjmp	receive_overflow	nop	; Timer1 Overflow Handler
	rjmp	display	nop ; Timer0 Overflow Handler
	reti	nop	; SPI Transfer Complete Handler
	rjmp	uart_rx	nop	; USART RX Complete Handler
	reti	nop	; UDR Empty Handler
	reti	nop	;rjmp	uart_tx	nop	; USART TX Complete Handler
	reti	nop	; ADC Conversion Complete Handler
	reti	nop	; EEPROM Ready Handler
	reti	nop	; Analog Comparator Handler
	reti	nop	; Two-wire Serial Interface Handler
	reti	nop	; IRQ2 Handler
	reti	nop	; Timer0 Compare Handler
	reti	nop	; SPM Ready Handler



; Àû¿Ü¼± ¸®¸ðÄÁ ¼ö½ÅÀ» À§ÇÑ ·çƾ
; routine for receiving an IR remote control
receive:
	out	TCNT1H,zero	; clear timer
	out	TCNT1L,zero

	push	tmp
	in	tmp,SREG
	push	tmp
	push	tmp2
	outi	TIMSK,timer1_interrupt_remote_mode	; timer/count 0 overflow interrupt enable, Timer Capture interrupt enable
	outi	TCCR1A,timer1_control1_remote_mode
	outi	TCCR1B,timer1_control2_remote_mode	; 16MHz/256 

	push	r0
	push	r1
	pusw	x
	pusw	z
	in	xL,ICR1L	;	ldi	tmp3,low(8500)
	in	xH,ICR1H	;	ldi	tmp4,high(8500)

	tst	ir_delay_count
	breq	PC+2
	rjmp	ir_range_ov

	mov	tmp,remote_count
	cpi	tmp,33
	brne	PC+2
	rjmp	ir_range_ov-2
	cpi	tmp,32
	brcs	PC+12
	ldi	tmp,high(8000)
	cpi	xL,low(8000)
	cpc	xH,tmp
	brcc	PC+2
	rjmp	ir_range_ov	; if 4.0ms > ICR1x, return
	ldi	tmp,high(10000)
	cpi	xL,low(10000)
	cpc	xH,tmp
	brcs	PC+2
	rjmp	receive_out	; 4.0ms < ICR1x < 5.0ms
	rjmp	ir_range_ov	; if 5.0ms < ICR1x, return
	ldi	tmp,high(500)
	cpi	xL,low(500)
	cpc	xH,tmp
	brcs	PC+7	; if 1,050,000ns > ICR1x, return
	ldi	tmp,high(3000)
	cpi	xL,low(3000)
	cpc	xH,tmp
	brcc	PC+3	; if 1,450,000ns < ICR1x, return
	clc
	rjmp	PC+10
	ldi	tmp,high(3000)
	cpi	xL,low(3000)
	cpc	xH,tmp
	brcs	ir_range_ov;+	; if 1,450,000ns < ICR1x, return
	ldi	tmp,high(5000)
	cpi	xL,low(5000)
	cpc	xH,tmp
	brcc	ir_range_ov;+	; if 1,050,000ns > ICR1x, return
	sec
	ror	ir_code_buff4
	ror	ir_code_buff3
	ror	ir_code_buff2
	ror	ir_code_buff1

	tst	remote_count
	brne	receive_out

	com	ir_code_buff4
	cp	ir_code_buff3,ir_code_buff4
	brne	receive_out
;	lds	tmp,ram_remocon_mode
	ldiw	x,rom_remocon_mode
	call	eep_read
	mov	xL,tmp
	ldi	tmp2,2
	mul	tmp,tmp2
	ldiw	z,ir_custom_list*2
	add	zL,r0
	adc	zH,r1
	lpm	tmp,z+
	cp	ir_code_buff1,tmp	; ir code compare 1st
	brne	ir_range_ov
	lpm	tmp,z
	cp	ir_code_buff2,tmp	; ir code compare 2nd
	brne	ir_range_ov	; ir code no match
	clr	remote_data
;	lds	tmp,ram_remocon_mode
	ldi	tmp2,24
	mul	xL,tmp2
	ldiw	z,ir_data_list*2
	add	zL,r0
	adc	zH,r1
	ldi	tmp2,2
	lpm	tmp,z+
	cpi	tmp,0x00
	brne	PC+3
	dec	tmp2
	breq	ir_range_ov	;receive_out+5	; ir_data compare end, return
	cp	tmp,ir_code_buff3
	breq	PC+3
	inc	remote_data
	rjmp	PC-8
;	ldi	tmp,0
;	mov	ir_delay_count,tmp
	sbi	PORTA,statu_led
	clr	quick_memo_flag
	cpi	remote_data,10
	brcc	receive_out
	ldi	tmp,0x01
	mov	quick_memo_flag,tmp
receive_out:
;in	tmp,TCCR1B
	ldi	tmp,(1<<ICNC1)|(0<<ICES1)|(1<<CS11)	; falling edge
	out	TCCR1B,tmp
	dec	remote_count
	rjmp	PC+3
ir_range_ov:
	ldi	tmp,33
	mov	remote_count,tmp
	outi	TIMSK,(1<<TOIE0)|(1<<TOIE1)|(1<<TICIE1)	; timer/count 0 overflow interrupt enable, Timer Capture interrupt enable
	popw	z
	popw	x
	pop	r1
	pop	r0
	pop	tmp2
	pop	tmp
	out	SREG,tmp
	pop	tmp
	reti

receive_overflow:
	push	tmp
	push	tmp2
	in	tmp,SREG
	push	tmp
	ldi	tmp,high(62499)
	ldi	tmp2,low(62499)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
;	tst	ir_delay_count
;	breq	PC+3
;	dec	ir_delay_count
;	brne	PC+12
	ldi	tmp,33
	mov	remote_count,tmp
	clr	ir_code_buff3
	clr	ir_code_buff4
	cbi	PORTA,statu_led
	outi	TIMSK,timer1_interrupt_normal_mode	; timer/count 0 overflow interrupt enable, Timer Capture interrupt enable
	outi	TCCR1A,timer1_control1_normal_mode
	outi	TCCR1B,timer1_control2_normal_mode	; 16MHz/256

	pop	tmp
	out	SREG,tmp
	pop	tmp2
	pop	tmp
	reti


; display fot dot matrix
display:
	push	tmp
	in	tmp,SREG
	push	tmp
	push	tmp2
	push	loop_count
	pusw	x
	pusw	y
	pusw	z

	dec	line_select

	ldiw	x,ram_data_green
	ldiw	y,ram_data_red
	mov	tmp,line_select
	lsl	tmp
	lsl	tmp
	lsl	tmp
	add	xL,tmp
	adc	xH,zero
	add	yL,tmp
	adc	yH,zero

	lds	tmp,ram_brightness_mode
	bst	tmp,7

	ldiw	z,ram_data_green_buffer
	ldi	loop_count,8
	ld	tmp,x+
	ld	tmp2,y+
	brtc	PC+3
	com	tmp
	com	tmp2
	std	z+8,tmp
	st	z+,tmp2
	dec	loop_count
	brne	PC-8

	ldi	loop_count,64
	ldiw	x,ram_data_green_buffer
	ldiw	y,ram_data_red_buffer
	ld	tmp,x
	ld	tmp2,y
	bst	tmp,7
	ldi	tmp,(1<<PB7)|(1<<PB6)|(1<<PB5)|(1<<PB4)
	bld	tmp,1
	bst	tmp2,7
	bld	tmp,0
	out	PORTB,tmp
	adiw	x,8
	adiw	y,8
	cbi	PORTA,clock
	ldi	tmp2,8
	ld	tmp,-x
	rol	tmp
	st	x,tmp
	dec	tmp2
	brne	PC-4
	ldi	tmp2,8
	ld	tmp,-y
	rol	tmp
	st	y,tmp
	dec	tmp2
	brne	PC-4
	sbi	PORTA,clock
	dec	loop_count
	brne	PC-29

	mov	tmp,line_select
	ori	tmp,(1<<clock)
	sbic	PORTA,statu_led
	ori	tmp,(1<<statu_led)
	cbi	PORTA,latch
	out	PORTA,tmp	; line address out with latch I/O delay
	sbi	PORTA,latch

	tst	line_select
	brne	PC+3	; scan end of display?
	ldi	tmp,0x10
	mov	line_select,tmp

	popw	z
	popw	y
	popw	x
	pop	loop_count
	pop	tmp2
	pop	tmp
	out	SREG,tmp
	pop	tmp
	reti


; GPS NMEA parser
; GPS NMEA ÄÚµå Æļ­
	.db	"GPRMC",0	; wan't this format
uart_rx:
	push	tmp
	in	tmp,SREG
	push	tmp
	push	tmp2
	push	tmp4
	push	loop_count
	pusw	y
	pusw	z

	ldiw	y,ram_uart_rx_buffer
	ldd	tmp4,y+gps_format_match

	in	tmp,UDR	; read data
	ldd	loop_count,y+gps_rx_count
	cpi	tmp,'$'
	brne	PC+6
	mov	loop_count,zero	; clear rx format count
	ldi	tmp4,0x01	; 1 = GPRMC, 0 = no match
	std	y+gps_format_match,tmp4
	std	y+gps_data_store_addr,zero	; clear store address count
	rjmp	PC+43	; go returen(inc rx counter+1)

	cpi	tmp4,0x00
	breq	PC+42	; no match format, go return

	cpi	loop_count,5
	brcc	PC+11
	
	ldiw	z,(uart_rx-3)*2
	add	zL,loop_count
	adc	zH,zero
	lpm	tmp2,z
	eor	tmp2,tmp
	breq	PC+2
	andi	tmp4,~0x01	; format is not GPRMC
	std	y+gps_format_match,tmp4
	rjmp	PC+28		; go returen(inc rx counter)

	cpi	tmp,','
	breq	PC+26	; go returen(inc rx counter)

	movw	z,y
	cpi	tmp4,0x01
	brne	PC+25	; not match format, go return
	cpi	loop_count,7	; format : GPRMC & validity
	brne	PC+4
	std	y+gps_data_store_addr,zero	; clear rx data count
	std	y+gps_retention,tmp	; gps validity
	rjmp	PC+20		; go return
	cpi	loop_count,6	; format : GPRMC & clock
	brne	PC+6
	cpi	tmp,'.'
	breq	PC+15
	adiw	z,7
	rjmp	PC+4
	clr	tmp4
	cpi	loop_count,14	; format : GPRMC & date
	brne	PC+7
	ldd	tmp4,y+gps_data_store_addr
	add	zL,tmp4
	adc	zH,zero
	sbiw	z,1
	std	z+0,tmp	; store clock or date
	inc	tmp4
	std	y+gps_data_store_addr,tmp4
	rjmp	PC+3

	inc	loop_count	; format count increase
	std	y+gps_rx_count,loop_count


	popw	z
	popw	y
	pop	loop_count
	pop	tmp4
	pop	tmp2
	pop	tmp
	out	SREG,tmp
	pop	tmp
	reti


reset:
	ldi	tmp,high(RAMEND)
	ldi	tmp2,low(RAMEND)
	out	SPH,tmp
	out	SPL,tmp2


.if	hw_model	== 0
	outi	DDRA,0x7f
	outi	DDRB,(1<<out_enable)|(1<<data_green)|(1<<data_red)
	outi	DDRC,0x00
	outi	DDRD,0x3f

	outi	PORTA,(1<<clock)|(1<<latch)|(1<<statu_led)
	outi	PORTB,(1<<PB7)|(1<<PB6)|(1<<PB5)|(1<<PB4)
	outi	PORTC,(1<<PC2)|(1<<PC1)|(1<<PC0)	; i2c ports & key pull-up
	outi	PORTD,(1<<PD7)|(1<<PD6)|(0<<PD5)|(0<<PD4)|(1<<PD1)|(1<<PD0)	; PD4 = speaker
.elif	hw_model	== 1
	outi	DDRA,0x7f
	outi	DDRB,(1<<out_enable)|(1<<data_green)|(1<<data_red)
	outi	DDRC,(1<<reset_rfmodule)|(1<<reset_touch)
	outi	DDRD,0x3f

	outi	PORTA,(1<<clock)|(1<<latch)
	outi	PORTB,0
	outi	PORTC,(1<<PC1)|(1<<PC0)	; i2c ports & key pull-up , rf/touch reset on
	outi	PORTD,(1<<PD1)|(1<<PD0)	; PD4 = speaker
.endif

	clr	zero
	clr	ir_delay_count
	call	clear_all	; initialize display ram

; GPS USART Initialize
	ldi	tmp,high(95)	; for 9,600bps
	ldi	tmp2,low(95)
	out	UBRRH,tmp
	out	UBRRL,tmp2
	outi	UCSRA,0
	outi	UCSRB,(1<<RXCIE)|(0<<TXCIE)|(1<<RXEN)|(1<<TXEN)	; Tx,Rx,int Enable
	outi	UCSRC,(1<<UCSZ1)|(1<<UCSZ0)|(1<<URSEL)	; no parity, stop bit 1, 8 bit data
	nop
	in	tmp,UDR	; dummy read

	ldiw	z,uart_tx_list*2

	lpm	tmp,z+
	cpi	tmp,0	; end string?
	breq	PC+5
	sbis	UCSRA,UDRE
	rjmp	PC-1
	out	UDR,tmp
	rjmp	PC-6

; Twi SET
	outi	TWBR,66	; 100kHz, 14.7456MHz
	outi	TWSR,0
	outi	TWCR,(1<<TWEN)

; ADC
	outi	ADMUX,(0<<REFS1)|(1<<REFS0)|(0<<ADLAR)|0x07	; AREF = AVCC, input = ADC3
	outi	ADCSRA,(1<<ADEN)|(0<<ADSC)|(0<<ADATE)|(1<<ADIF)|(0<<ADIE)|0x05	; ADC Enable, ADIF Clear, Division = 32
	outi	MCUCR,(1<<SE)|(0<<PUD)
	wdr
	outi	WDTCR,(1<<WDE)|(1<<WDP2)|(1<<WDP1)|(1<<WDP0)

	outi	TCCR0,(1<<CS01)|(1<<CS00)|(1<<WGM00)|(1<<WGM01)|(1<<COM01)|(1<<COM00)
	outi	TCCR1B,(1<<CS11)|(1<<ICES1)|(1<<ICNC1)	; input noise canceler enable, rising edge	; 16MHz/8
	outi	TIFR,(1<<OCF1A)|(1<<OCF1B)|(1<<ICF1)	; clear all interrupt flag
	outi	TIMSK,(1<<TOIE0)|(1<<TOIE1)|(1<<TICIE1)	; timer/count 0 overflow interrupt enable, Timer Capture interrupt enable

	out	GIMSK,zero
	out	GICR,zero
	out	TCCR1A,zero	; ctc mode, not use OC1A

	ldi	tmp,0x10
	mov	line_select,tmp

	ldi	tmp,31
	mov	remote_count,tmp

	ldi	tmp,'v'
	sts	ram_uart_rx_buffer+gps_retention,tmp

	ldi	tmp,esave_count
	sts	esave_count_buff,tmp

	ldiw	x,rom_brightness_mode	; initialize eeprom address
;	ldiw	y,ram_brightness_mode	; initialize s-ram address	; 2010/11/09 ·¥À¸·Î ·ÎµåÇÏÁö ¾Ê°í EEPROM DataÀ¯È¿¼º äũ¸¸ ¼öÇà
	call	eep_read	;
	sts	ram_brightness_mode,tmp	; 2010/11/09 rxm_brightness_mode ·ÎµåÇÏ´Â ÀÌÀ¯´Â display·çƾ¿¡ È­¸é ¹ÝÀü/¿ª¹ÝÀü ÆǴܽà EEPROM¿¡¼­ ¸Å¹ø ÀÐÀ¸¸é ³Ê¹« ´À·ÁÁö±â ¶§¹®ÀÓ
	ldiw	z,check_value_eeprom*2
	ldi	tmp,high(rom_quick_memo+10+1)
	cpi	xL,low(rom_quick_memo+10+1)	; eeprom read end?
	cpc	xH,tmp
	breq	PC+10
	call	eep_read
	lpm	tmp2,z+
	cp	tmp,tmp2
	breq	PC+2
	brcc	eep_init
	nop	;	st	y+,tmp	; eeprom retention good, read data store	; 2010/11/09 À§ ÀÌÀ¯¿Í °°À½
	adiw	x,1	; address increase
	rjmp	PC-12

	ldi	tmp,0x00
	call	rtc_read
	sbrs	tmp,7	; Clock Hold(bit 7) set? RTC intialize
	rjmp	PC+22
	ldiw	y,ram_data_red
	call	draw_circle

	ldiw	x,ram_data_red+32
	ldiw	z,rtc_init_msg*2
	call	string_small
	ldi	tmp3,0
	ldiw	z,rtc_init*2
	mov	tmp,tmp3
	lpm	tmp2,z+
	call	rtc_write
	inc	tmp3
	cpi	tmp3,7
	brne	PC-6
	rjmp	init_out

	ldi	tmp,0x07
	ldi	tmp2,0x90	; SQW Enable, 1Hz
	call	rtc_write

	ldi	remote_data,0xff
	clr	zero	; clear zero register
	clr	quick_memo_flag

	clr	adc_count
	call	check_brightness
	ldi	tmp,1
	call	wait_ms
	tst	adc_count
	brne	PC-6

	cbi	PORTA,statu_led
	sei	; interrupt enable(display on)

	call	sound_pass_on	; boot ok!

	rf_on
	touch_on

	ldi	tmp,display_main_count-1
	mov	r13,tmp
	ldi	tmp,50
	mov	r12,tmp
	ldi	tmp,1
	rjmp	display_main


eep_init:
	ldiw	y,ram_data_red
	call	draw_circle

	ldiw	x,ram_data_red+32
	ldiw	z,eep_init_msg*2
	call	string_small

	ldiw	z,check_value_eeprom_init*2
	ldiw	x,rom_brightness_mode
	cpi	xH,high(rom_quick_memo+10+1)	; eeprom read end?
	brne	PC+3
	cpi	xL,low(rom_quick_memo+10+1)
	breq	init_out
	lpm	tmp,z+
	call	eep_write
	adiw	x,1
	rjmp	PC-8
init_out:
	sei	; error message on!

	ldi	tmp,255
	out	OCR0,tmp

	clr	key_count
	call	sound_fail

	call	delay_alert_view

	rjmp	reset




; 2010/03/14 À̹ÎÁÖ GPS ºÎºÐ Ãß°¡
; GMT Ç¥Áؽÿ¡¼­ 9½Ã°£À» ´õÇÔ
; Greenwich time, adding 9 hours
	.db	0,3,3,6,8,11,13,16,19,21,24,26	; make week reference
gmt_processor:
	ldiw	y,ram_uart_rx_buffer
	push	tmp
	ldd	tmp,y+gps_retention
	cpi	tmp,'A'
	pop	tmp
	breq	PC+3
	sbi	UCSRB,RXCIE
	ret

	ldi	tmp,'O'
	std	y+gps_retention,tmp

	push	tmp
	push	tmp2
	push	tmp3
	push	tmp4
	push	loop_count
	push	key_count
	push	remote_data

	ldiw	z,ram_process_buffer

	ldi	loop_count,6
	ldi	tmp3,10
	ld	tmp,y+
	ld	tmp2,y+	; load from sram 
	andi	tmp,0x0f
	andi	tmp2,0x0f
	mov	tmp4,tmp	;
	swap	tmp4	;
	or	tmp4,tmp2	;
	st	z+,tmp4	;
	mul	tmp,tmp3
	add	r0,tmp2
	push	r0	; store to stack 6 times(day/month/year/hour/minute/second)
	dec	loop_count
	brne	PC-12

	pop	r21	; second
	pop	r20	; minute
	pop	r19	; hour
	pop	r16	; year
	pop	r17	; month
	pop	r18	; day

;	ldiw	y,ram_time_second
;	ldd	r23,y+2
;	ldd	r24,y+3
;	andi	r23,0x0f
;	andi	r24,0x0f
;	swap	r23
;	or	r24,r23
	ldiw	y,ram_process_buffer
	ldd	r24,y+1

	ldi	r23,31	; initialize value 31
	cpi	r24,8
	brcs	PC+4	; 8¿ùÀ̰ųª ±× ÀÌ»óÀÎ °æ¿ì ºÐ±â.
	sbrs	r24,0	; month : 8~12   ; 2010³â 10¿ù 31ÀÏ modify
	ldi	r23,30	; month : 8~12 even, else odd
	rjmp	PC+25	;26
	cpi	r24,2
	breq	PC+4	; month : 2 (February)
	sbrc	r24,0	; month : 8~12
	ldi	r23,30	; month : 1, 3~7 even, else odd
	rjmp	PC+20	;25

;	ldd	r23,y+4
;	ldd	r24,y+5
;	andi	r23,0x0f
;	andi	r24,0x0f
;	swap	r23
;	or	r24,r23
	ldd	r24,y+2

	sbrc	r24,4
	rjmp	PC+9	; 10 order year : even
	andi	r24,0x0f
	cpi	r24,0x00	; 10 order year : odd
	breq	PC+13
	cpi	r24,0x04
	breq	PC+11
	cpi	r24,0x08
	breq	PC+9
	rjmp	PC+6
	andi	r24,0x0f
	cpi	r24,0x02
	breq	PC+5
	cpi	r24,0x06
	breq	PC+3
	ldi	r23,28
	rjmp	PC+2
	ldi	r23,29

	ldi	r22,9	; set gmt
	mov	r25,r22
	mov	r24,r19	

	subi	r22,24	; 0~48
	sbrc	r22,7
	neg	r22
	cp	r19,r22
	brcs	PC+17
	cp	r18,r23	; bug
	brne	PC+9
	cpi	r17,12
	brne	PC+5
	inc	r16	; add 1year
	ldi	r17,1	; next years month = 1
	ldi	r18,1	; day = 1
	rjmp	PC+4	;?
	inc	r17	; next month
	rjmp	PC-3
	inc	r18	; next day

	subi	r24,24
	neg	r24
	sub	r25,r24
	mov	r19,r25
	rjmp	PC+2
	add	r19,r25

/*	ldi	r22,1	; am
	cpi	r19,0	; 0hr -> am 12
	brne	PC+3
	ldi	r19,12
	rjmp	PC+6

	cpi	r19,12	; 1~11hr -> am 1~11hr
	breq	PC+3
	brcs	PC+3
	subi	r19,12	; 12~23hr -> pm 12~23hr
	ldi	r22,1	; pm;;;;;;;;;;;;;;;
	nop	nop;	sts	ram_time_ampm,r22
	bst	r22,0*/

	push	r16	; year
	push	r17	; month
	push	r18	; day
	push	r19	; hour
	push	r20	; minute
	push	r21	; second

;	ldiw	y,ram_time_second

	clr	r22	; rtc addr 0
	ldi	r21,6	; loop_count

	pop	tmp	; data load(6 times)

	push	loop_count

	clr	r0
	clr	tmp2
	clr	tmp3
	clr	tmp4

	ldi	loop_count,16
	lsl	tmp
	rol	tmp2
	rol	tmp3
	rol	tmp4
	cpi	tmp4,0
	brne	PC+3
	cpi	tmp3,10
	brlo	PC+5
	subi	tmp3,10
	sbci	tmp4,0
	sec
	rjmp	PC+2
	clc
	rol	r0
	dec	loop_count
	brne	PC-15

	swap	r0
	or	tmp3,r0
	cpi	r21,4
	brne	PC+3
	andi	tmp3,~0x40	; 12 hours -> for DS1307
nop	;ORI	TMP3,0X20;	bld	tmp3,5	; ampm -> for DS1307	;;;;;;;;;;;;;;;;;
	mov	tmp,r22
	mov	tmp2,tmp3
	call	rtc_write
;	st	y+,tmp3

	pop	loop_count
	inc	r22	; rtc addr inc
	cpi	r22,3	; rtc day not save
	breq	PC-2
	dec	r21
	brne	PC-38


	pop	remote_data
	pop	key_count
	pop	loop_count
	pop	tmp4
	pop	tmp3
	pop	tmp2
	pop	tmp

	ret





.equ	display_main_count	= 5
display_main:;	jmp	play_game_tetris

	ldiw	z,display_list*2
	lsl	tmp
	push	tmp
	add	zL,tmp
	adc	zH,zero
	mov	tmp,r13
	lsl	tmp
	lsl	tmp
	add	zL,tmp
	adc	zH,zero

	lpm	tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2

	icall

	ldiw	z,display_chg_eff_list*2

	ldiw	x,rom_set_effect
	call	eep_read
	lsl	tmp
	lsl	tmp

	add	zL,tmp
	adc	zH,zero

	pop	tmp
	add	zL,tmp
	adc	zH,zero

	lpm	tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2

	icall

	ldiw	z,display_loop_list*2
	mov	tmp,r13
	lsl	tmp
	add	zL,tmp
	adc	zH,zero

	lpm	tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2

	touch_reset

display_main_loop:
	pusw	z
	icall

	call	check_alarm	; brightness check Æ÷ÇÔ
	rcall	gmt_processor

;	tst	r13
;	brne	PC+2
;	rcall	display_clock_loop
	popw	z

	call	key_check
	cpi	tmp,key_ent
	brne	PC+4
	call	sound_entry
	rjmp	menu_main_entry

	cpi	tmp,key_esc
	brne	PC+5
	call	sound_pass
	jmp	sleep_mode

	cpi	tmp,key_dec
	brne	PC+11
	call	sound_decrease
	inc	r13
	ldi	tmp,display_main_count
	cp	r13,tmp
	brne	PC+2
	clr	r13
	clr	r12
	clr	tmp
	rjmp	display_main

	cpi	tmp,key_inc
	brne	PC+11
	call	sound_increase
	tst	r13
	brne	PC+3
	ldi	tmp,display_main_count
	mov	r13,tmp
	dec	r13
	clr	r12
	ldi	tmp,1
	rjmp	display_main

	dec	r12
	breq	PC+2
	rjmp	display_main_loop

display_main_skip:
	inc	r13
	ldi	tmp,display_main_count
	cp	r13,tmp
	brcs	display_main_cont

	clr	r13
	ldiw	x,rom_brightness_mode
	call	eep_read
	andi	tmp,0x01	; e-save mode?
	breq	display_main_cont

	lds	tmp,esave_count_buff
	dec	tmp
	sts	esave_count_buff,tmp
	brne	display_main_cont

	call	big_yellow_string_upper
	call	eff_change_scroll_down
	ldi	tmp,1
	out	OCR0,tmp
	jmp	sleep_mode
display_main_cont:
	ldiw	x,rom_disp_mode
	add	xL,r13
	adc	xH,zero
	call	eep_read

	ldiw	z,check_wait_count_db*2
	add	zL,tmp
	adc	zH,zero
	lpm	r12,z

	clr	tmp

	tst	r12
	breq	display_main_skip

	rjmp	display_main

display_main_enter:
	ldi	tmp,high(RAMEND)
	ldi	tmp2,low(RAMEND)
	out	SPH,tmp
	out	SPL,tmp2

	clr	tmp
	clr	r13
	rjmp	display_main_cont

display_list:
	.dw	display_clock
	.dw	display_clock_back
	.dw	display_date
	.dw	display_date_back
	.dw	display_temperature
	.dw	display_temperature_back
	.dw	display_dday
	.dw	display_dday_back
	.dw	display_logo
	.dw	display_logo_back

display_loop_list:
	.dw	display_clock_loop
	.dw	display_date_loop
	.dw	display_temperature_loop
	.dw	display_dday_loop
	.dw	display_logo_loop

display_chg_eff_list:
	.dw	eff_change_linefeed_down
	.dw	eff_change_linefeed_up
	.dw	eff_change_scroll_down
	.dw	eff_change_scroll_up
	.dw	eff_change_snow_down
	.dw	eff_change_scroll_left_all
	.dw	eff_change_fade_inout
	.dw	eff_change_linefeed_up
	.dw	eff_not
	.dw	eff_not

check_wait_count_db:
	.db	0,30,60,127,255,0

display_clock_back:
	ldiw	y,ram_data_green_lower
	ldiw	z,ram_data_red_lower
	rcall	display_clock_common1
	ldiw	x,ram_data_green_lower+64+6
	rcall	display_clock_common2
	ldiw	z,ram_data_green_lower
	rcall	display_clock_common3
	ldiw	x,ram_data_red_lower-16
	rcall	display_clock_common4
	ldiw	z,ram_data_green_lower+7
	rcall	display_clock_common5

	ret

display_clock:
	ldiw	y,ram_data_green_upper
	ldiw	z,ram_data_red_upper
	rcall	display_clock_common1
	ldiw	x,ram_data_green_upper+64+6
	rcall	display_clock_common2

	ldiw	z,ram_data_green_upper
	rcall	display_clock_common3
	ldiw	x,ram_data_red_upper-16
	rcall	display_clock_common4

	ldiw	z,ram_data_green_upper+7
	rcall	display_clock_common5

	ret

display_clock_loop:
; 2010/12/11 am/pm ±ôºýÀÓ Áõ»ó °³¼±
;	ldi	tmp,0	; second
;	call	rtc_read
;	cp	tmp,tmp4
;	mov	tmp4,tmp
;	breq	PC+12

;	ldiw	y,ram_data_green
;	ldiw	z,ram_data_red
;	rcall	display_clock_common1
;	ldiw	x,ram_data_green+64+6
;	rcall	display_clock_common2
;	ldiw	z,ram_data_green-16
;	rcall	display_clock_common3
;	ldiw	x,ram_data_red-16
;	rcall	display_clock_common4

	rcall	display_clock


eff_not:
	rcall	load_hidden_buff

	ret




display_date_back:
	ldiw	y,ram_data_green_lower
	ldiw	z,ram_data_red_lower
	rcall	display_date_common1

	ldiw	x,ram_data_green_lower+6
	rcall	display_date_common2

	ldiw	x,ram_data_green_lower+62
	rcall	display_date_common3

	ldiw	x,ram_data_red_lower-16
	rcall	display_clock_common4
	ret


display_date:
	ldiw	y,ram_data_green_upper
	ldiw	z,ram_data_red_upper
	rcall	display_date_common1

	ldiw	x,ram_data_green_upper+6
	rcall	display_date_common2

	ldiw	x,ram_data_green_upper+62
	rcall	display_date_common3

	ldiw	x,ram_data_red_upper-16
	rcall	display_clock_common4
	ret


display_date_loop:
	rcall	display_date
	rcall	load_hidden_buff
	ret


display_temperature_back:
	ldiw	y,ram_data_green_lower
	ldiw	z,ram_data_red_lower
	rcall	display_temperature_common1
	
	ldiw	x,ram_data_red_lower-16
	rcall	display_clock_common4
	ret

display_temperature:
	ldiw	y,ram_data_green_upper
	ldiw	z,ram_data_red_upper
	rcall	display_temperature_common1

	ldiw	x,ram_data_red_upper-16
	rcall	display_clock_common4
	ret

display_temperature_loop:
	rcall	display_temperature
;	rcall	load_hidden_buff

	ldiw	y,ram_data_green_upper+7
	ldiw	z,ram_data_green+7
	ldi	loop_count,32	; 0 is 256
	ld	tmp,y
	st	z,tmp
	adiw	y,8
	adiw	z,8
	cpi	loop_count,16
	brne	PC+5
	ldiw	y,ram_data_red_upper+7
	ldiw	z,ram_data_red+7
	dec	loop_count
	brne	PC-11
	ret


display_dday_back:
	ldiw	x,ram_data_green_lower+64
	ldiw	y,ram_data_green_lower
	ldiw	z,ram_data_red_lower
	rcall	display_dday_common1
	ldiw	x,ram_data_red_lower
	call	menu3_dday_msg_string
	
	ldiw	x,ram_data_red_lower-16
	rcall	display_clock_common4
	ret
	.db	"REMAIN    "
	.db	"RUNNING   "
display_dday:
	ldiw	x,ram_data_green_upper+64
	ldiw	y,ram_data_green_upper
	ldiw	z,ram_data_red_upper
	rcall	display_dday_common1
	ldiw	x,ram_data_red_upper
	call	menu3_dday_msg_string
	
	ldiw	x,ram_data_red_upper-16
	rcall	display_clock_common4
	ret

display_dday_loop:
	rcall	display_dday
	rcall	load_hidden_buff
	ret

display_logo:
	call	big_yellow_string_upper

	ldiw	x,ram_data_green_upper+16
	rcall	display_logo_common

	ldiw	x,ram_data_red_upper+32
	ldiw	z,display_logo_msg_red*2
	call	string_small_type2
	ldiw	x,ram_data_green_upper+32
	ldiw	z,display_logo_msg_green*2
	call	string_small_type2
	ret

display_logo_back:
	call	big_yellow_string_lower
	ldiw	x,ram_data_green_lower+16
	rcall	display_logo_common
	ldiw	x,ram_data_red_lower+32
	ldiw	z,display_logo_msg_red*2
	call	string_small_type2
	ldiw	x,ram_data_green_lower+32
	ldiw	z,display_logo_msg_green*2
	call	string_small_type2
display_logo_loop:
	ret

display_logo_common:
	ldi	tmp3,0x00
	ldi	tmp4,0xff
	ldi	tmp,0x7f
	ldi	tmp2,0xfe
	
	ldi	loop_count,8
	st	x+,tmp3
	dec	loop_count
	brne	PC-2
	ldi	loop_count,10
	st	x+,tmp
	st	x+,tmp4
	st	x+,tmp4
	st	x+,tmp4
	st	x+,tmp4
	st	x+,tmp4
	st	x+,tmp4
	st	x+,tmp2
	dec	loop_count
	brne	PC-9
	ldi	loop_count,8
	st	x+,tmp3
	dec	loop_count
	brne	PC-2
	ret

display_logo_msg_red:
	.db	"L",'E'&0x3f|0x80,'B'&0x3f|0x80,"S",'O'&0x3f|0x80,'F'&0x3f|0x80,'T'&0x3f|0x80,"   "
display_logo_msg_green:
	.db	"   S",'O'&0x3f|0x80,'F'&0x3f|0x80,'T'&0x3f|0x80,'I'&0x3f|0x80,'N'&0x3f|0x80,'C'&0x3f|0x80
	
;&0x3f|0x80

display_clock_common1:
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 1
;	lds	tmp,ram_time_hour
	ldi	tmp,2
	call	rtc_read
	mov	r25,tmp

	ldiw	x,rom_brightness_mode
	call	eep_read
	andi	tmp,0x04
	brne	PC+16	; 24½Ã°£Á¦ÀÏ °æ¿ì ¹Ù·Î Ç¥½Ã
	cpi	r25,0x00	; 12½Ã°£Á¦ÀÏ °æ¿ì ó¸® ÈÄ Ç¥½Ã
	brne	PC+3
	ldi	r25,0x12
	rjmp	PC+12
	cpi	r25,0x13
	brcs	PC+10
	cpi	r25,0x20
	brcs	PC+3
	cpi	r25,0x22
	brcs	PC+3
	ldi	tmp2,0x06
	add	r25,tmp2
	subi	r25,0x18
	rjmp	PC+2
	subi	r25,0x12

	push	r25
	swap	r25
	andi	r25,0x0f
	mov	tmp,r25
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 2
;	lds	tmp,ram_time_hour
	pop	tmp
	andi	tmp,0x0f
	rcall	put_alpha_byte	; 3




;	ldiw	y,ram_data_green_upper+3
;	ldiw	z,ram_data_red_upper+3

	ldi	tmp,0x0f
	sbis	PIND,PD7
	ldi	tmp,0x0a
;	movw	x,y
;	call	put_alpha
;	movw	x,z
;	call	put_alpha

;	ldi	tmp,0x0f
	rcall	put_alpha_byte	; 4
;	lds	tmp,ram_time_minute
	ldi	tmp,1
	call	rtc_read
	push	tmp
	swap	tmp
	andi	tmp,0x0f
	rcall	put_alpha_byte	; 5
;	lds	tmp,ram_time_minute
	pop	tmp
	andi	tmp,0x0f
	rcall	put_alpha_byte	; 6
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 7
	rcall	put_alpha_byte	; 8
	ret
display_clock_common2:
;	lds	tmp,ram_time_second
	ldi	tmp,0
	call	rtc_read
	push	tmp
	swap	tmp
	andi	tmp,0x0f
	cpi	tmp,0x00
	brne	PC+3
	ldi	tmp3,7
	rjmp	PC+6
	ori	tmp,0xa0
	ldi	tmp3,2
	call	put_small
	ldi	tmp3,4
	adiw	x,1
;	lds	tmp,ram_time_second
	pop	tmp
	andi	tmp,0x0f
	ori	tmp,0xa0
	call	put_small


	; 2011/04/16 ¿ìÃà Á¤·Ä
	ldi	loop_count,16*3

	ldiw	x,ram_data_green_upper
	ldiw	y,ram_data_red_upper
	ldi	tmp2,8
	sec
	ld	tmp,x
	ror	tmp
	st	x+,tmp
	dec	tmp2
	brne	PC-4
	ldi	tmp2,8
	sec
	ldi	tmp2,8
	ld	tmp,y
	ror	tmp
	st	y+,tmp
	dec	tmp2
	brne	PC-4
	dec	loop_count
	breq	PC+6
	cpi	loop_count,16
	breq	PC-22
	cpi	loop_count,32
	breq	PC-24
	rjmp	PC-21
	ret

display_clock_common3:
;	lds	tmp,ram_time_ampm
;	tst	tmp
;	lds	tmp,ram_time_hour
	ldiw	x,rom_brightness_mode
	call	eep_read
	andi	tmp,0x04
	brne	PC+22	; 2010/11/11 24½Ã°£Á¦ÀÏ °æ¿ì AM/PMÀ» Ç¥½ÃÇÏÁö ¾ÊÀ½.
	movw	x,z
	ldi	tmp,2
	call	rtc_read
	cpi	tmp,0x12
	brcc	PC+3
	ldi	tmp,0xb3	;'A'&0x3f|0x80	; a
	rjmp	PC+6
	ldi	tmp,0xb4	;'P'&0x3f|0x80	; p
	ldi	tmp2,low(128*3)	; PMÀ̸é RED¿µ¿ªÀ¸·Î ÁÖ¼Ò¸¦ ´õÇÔ
	ldi	tmp3,high(128*3)
	add	xL,tmp2
	adc	xH,tmp3
	ldi	tmp3,1
	call	put_small
	adiw	x,1
	ldi	tmp3,3
	ldi	tmp,0xb5	;'M'&0x3f|0x80	; m
	call	put_small
	ret

; 2010/11/16 GPS ¼ö½ÅºÒ·®ÀÏ °æ¿ì Ç¥½Ã
display_clock_common4:
	lds	tmp,ram_uart_rx_buffer+gps_retention
	cpi	tmp,'V'
	breq	PC+2
	ret
	ldi	tmp,0x9c
	ldi	tmp3,0
	call	put_small

;	ldi	tmp,low(128*3)
;	ldi	tmp2,high(128*3)
;	add	xL,tmp
;	adc	xH,tmp2
	subi	xL,low(128*3)
	sbci	xH,high(128*3)
	
	sbis	PIND,PD7
	ret
	call	put_small
	ret

display_clock_common5:	; display alarm
	ldiw	x,rom_alarm_mode
	call	eep_read
	cpi	tmp,0
	brne	PC+2
	ret
	movw	x,z
	ldi	tmp,0xb0	; bell green
	ldi	tmp3,3

	call	put_small

	subi	xL,0-low(128*3)
	sbci	xH,255-high(128*3)

	ldi	tmp,0xb1	; bell red
	sbis	PIND,PD7
	ldi	tmp,0xb2	; bell red
	call	put_small
	ret



display_date_common1:
	ldi	tmp,5	; month
	call	rtc_read
	push	tmp
	swap	tmp
	andi	tmp,0x0f
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 1
	pop	tmp
	andi	tmp,0x0f
	rcall	put_alpha_byte	; 2
	ldi	tmp,0x0d	; /

	movw	x,y
	call	put_alpha

	ldi	tmp,0x0a
	movw	x,z
	call	put_alpha	; 3
	adiw	y,1
	adiw	z,1

	ldi	tmp,4	; day
	call	rtc_read
	push	tmp
	swap	tmp
	andi	tmp,0x0f
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 4

	pop	tmp
	andi	tmp,0x0f
	rcall	put_alpha_byte	; 5
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 6
	rcall	put_alpha_byte	; 7
	rcall	put_alpha_byte	; 8
	ret


	
	.db	0,3,3,6,8,11,13,16,19,21,24,26
display_date_common2:
	push	tmp4
	push	loop_count
; make week(day)
;	ldiw	z,ram_date_day+2+1
	ldi	tmp4,6
;	ldi	loop_count,3	; convert hex to decimal
	ldi	tmp3,10
;	ld	tmp,-z	; load from sram 
	mov	tmp,tmp4
	call	rtc_read

	mov	tmp2,tmp
	swap	tmp
	andi	tmp,0x0f
	mul	tmp,tmp3
	andi	tmp2,0x0f
	add	r0,tmp2
	push	r0	; store to stack 3 times(year/month/day)
	dec	tmp4
	cpi	tmp4,3
	brne	PC-12

	ldi	tmp,0x06+1	; 2000/01/01 is saturday
	pop	tmp2	; load day
	subi	tmp2,1
	add	tmp,tmp2	; add day
	pop	tmp4	; load month
	pop	tmp2	; load year
	add	tmp,tmp2	; add years
	mov	tmp3,tmp2
	andi	tmp3,0x01
	brne	PC+2
	subi	tmp2,1
	lsr	tmp2
	lsr	tmp2
	add	tmp,tmp2

	cpi	tmp4,3
	brcs	PC+18
	ldd	tmp3,z+2	; load years
	sbrc	tmp3,4
	rjmp	PC+9	; 10 order year : even
	andi	tmp3,0x0f
	cpi	tmp3,0x00	; 10 order year : odd
	breq	PC+11
	cpi	tmp3,0x04
	breq	PC+9
	cpi	tmp3,0x08
	breq	PC+7
	rjmp	PC+7
	andi	tmp3,0x0f
	cpi	tmp3,0x02
	breq	PC+3
	cpi	tmp3,0x06
	brne	PC+2
	inc	tmp	; if intercalay month, add 1 day

	ldiw	z,display_date_common2*2-12-1
	add	zL,tmp4
	adc	zH,zero
	lpm	tmp2,z
	add	tmp,tmp2

	clr	tmp2
	clr	tmp3
	ldi	loop_count,16
	lsl	tmp
	rol	tmp2
	rol	tmp3
	cpi	tmp3,7
	brlo	PC+2
	subi	tmp3,7
	dec	loop_count
	brne	PC-7

;	sts	ram_date_weekday,tmp2
	sts	week_day,tmp3

	cpi	tmp3,0	; if weekend, display red
	breq	PC+3
	cpi	tmp3,6
	brne	PC+5
	ldi	tmp,low(128*3)
	ldi	tmp2,high(128*3)
	add	xL,tmp
	adc	xH,tmp2

	pusw	x

	sbiw	x,1
	ldi	loop_count,16
	ldiw	z,weekday_circle*2
	lpm	tmp,z+
	st	x+,tmp
	lpm	tmp,z+
	st	x+,tmp
	lpm	tmp,z+
	st	x+,tmp
	adiw	x,5
	adiw	z,1
	dec	loop_count
	brne	PC-9

	popw	x
;	pusw	x

; display week
	ldiw	z,display_date_week_day_list*2
	ldi	tmp2,3
	mul	tmp3,tmp2
	add	zL,r0
	adc	zH,r1
	ldi	tmp3,7
	lpm	tmp,z+
	call	put_small
	ldi	tmp3,1
	lpm	tmp,z+
	call	put_small
	adiw	x,1
	ldi	tmp3,3
	lpm	tmp,z
	call	put_small

;	popw	x

;	adiw	x,56




	pop	loop_count
	pop	tmp4
	ret



display_date_common3:
	ldi	tmp,5	; month
	call	rtc_read
	push	tmp
	subi	tmp,1
	cpi	tmp,0x0f
	brne	PC+2
	ldi	tmp,0x09
	mov	tmp2,tmp
	andi	tmp,0x0f
	swap	tmp2
	andi	tmp2,0x0f
	ldi	zL,10
	mul	tmp2,zL
	add	r0,tmp
	adc	r1,zero
	lsl	r0
	rol	r1

	ldiw	z,check_run_date*2
	add	zL,r0
	adc	zH,r1

	lpm	tmp3,z+
	lpm	tmp4,z

	ldi	tmp,4	; day
	call	rtc_read
	mov	tmp2,tmp
	andi	tmp,0x0f
	swap	tmp2
	andi	tmp2,0x0f
	ldi	zL,10
	mul	tmp2,zL
	add	r0,tmp
	adc	r1,zero

	add	tmp3,r0
	adc	tmp4,r1


	pop	tmp
	cpi	tmp,2
	brcs	PC+22

	ldi	tmp,6	; year
	call	rtc_read
	sbrs	tmp,4	; odd?
	rjmp	PC+7
	andi	tmp,0x0f
	cpi	tmp,0x02
	breq	PC+11
	cpi	tmp,0x06
	breq	PC+9
	rjmp	PC+11
	andi	tmp,0x0f
	cpi	tmp,0x00
	breq	PC+5
	cpi	tmp,0x04
	breq	PC+3
	cpi	tmp,0x08
	brne	PC+4

	inc	tmp3
	brne	PC+2
	inc	tmp4



;	(tmp4:tmp3 / tmp --> Q = tmp3, R = tmp4)
	ldi	tmp,100
	rcall	div8_a

	mov	r25,tmp3
	ori	r25,0xa0
	cpi	r25,0xa0
	brne	PC+2
	ldi	r25,' '

	mov	tmp3,tmp4
	clr	tmp4
;	(tmp4:tmp3 / tmp --> Q = tmp3, R = tmp4)
	ldi	tmp,10
	rcall	div8_a

	movw	z,tmp3:tmp4
	ori	zL,0xa0
	ori	zH,0xa0

	cpi	r25,' '
	brne	PC+6
	cpi	zL,0xa0
	brne	PC+4
	mov	zL,zH
	ldi	zH,0x80
	ldi	r25,0x80	; blank

	ldi	loop_count,2

	ldi	tmp3,7
	mov	tmp,r25
	call	put_small
	ldi	tmp3,1
	cpi	r25,' '
	brne	PC+2
	subi	tmp3,-3
	mov	tmp,zL
	call	put_small
	adiw	x,1
	ldi	tmp3,3
	cpi	r25,' '
	brne	PC+2
	subi	tmp3,-3
	mov	tmp,zH
	call	put_small

	ldi	tmp,low(128*3-1)
	ldi	tmp2,high(128*3-1)
	add	xL,tmp
	adc	xH,tmp2
	dec	loop_count
	brne	PC-24
	ret

check_run_date:
	.dw	0,31,59,90,120,151,181,212,243,273,304,334






display_date_week_day_list:
	.db 'S'&0x3f|0x80,'U'&0x3f|0x80,'N'&0x3f|0x80,'M'&0x3f|0x80,'O'&0x3f|0x80,'N'&0x3f|0x80
	.db 'T'&0x3f|0x80,'U'&0x3f|0x80,'E'&0x3f|0x80,'W'&0x3f|0x80,'E'&0x3f|0x80,'D'&0x3f|0x80
	.db 'T'&0x3f|0x80,'H'&0x3f|0x80,'U'&0x3f|0x80,'F'&0x3f|0x80,'R'&0x3f|0x80,'I'&0x3f|0x80
	.db 'S'&0x3f|0x80,'A'&0x3f|0x80,'T'&0x3f|0x80,0


put_alpha_byte:
	movw	x,y
	call	put_alpha
	movw	x,z
	call	put_alpha
	adiw	y,1
	adiw	z,1
	ret


display_temperature_common1:
	ldi	tmp,0b10010000	;	tcn75 address
	call	tcn75_read

	push	tmp

	andi	tmp2,0x7f
	breq	PC+3
	ldi	tmp,0x0a	; blank
	rjmp	PC+2
	ldi	tmp,0x10	; minus
	rcall	put_alpha_byte	; 1
	ldi	tmp4,0
	mov	tmp3,tmp2
	ldi	tmp,10

	rcall	DIV8_A


	mov	tmp,tmp3
	cpi	tmp,0
	brne	PC+2
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 2

	mov	tmp,tmp4
	rcall	put_alpha_byte	; 3

	ldi	tmp,0x0e
	rcall	put_alpha_byte	; 4

	pop	tmp
	tst	tmp
	breq	PC+3
	ldi	tmp,5
	rjmp	PC+2
	ldi	tmp,0
	rcall	put_alpha_byte	; 5

	ldi	tmp4,0x0b
	movw	x,y
	mov	tmp,tmp4
	call	put_alpha	; 6 & 7
	movw	x,z
	ldi	tmp,0x0a
	call	put_alpha
	adiw	y,1
	adiw	z,1
	inc	tmp4
	cpi	tmp4,0x0c+1
	brne	PC-12

	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 8

	ret


load_hidden_buff:

	ldiw	x,ram_data_green_upper
	ldiw	y,ram_data_green
	ldi	loop_count,0	; 0 is 256
	ld	tmp,x+
	st	y+,tmp
	cpi	loop_count,129
	brne	PC+5
	ldiw	x,ram_data_red_upper
	ldiw	y,ram_data_red
	dec	loop_count
	brne	PC-9
	ret


check_sleep_mode:
	ldiw	x,rom_brightness_mode
	call	eep_read
	andi	tmp,0x01	; e-save mode?
	breq	PC+11
	ldiw	x,RAMEND
	out	SPH,xH
	out	SPL,xL
	call	big_yellow_string_upper
	call	eff_change_scroll_down
	jmp	sleep_mode
	ret



; 2010/04/16 À̹ÎÁÖ
; D-DAY ³¯Â¥¸¦ Á÷Á¢ ÀÔ·ÂÇÏ´ø ¹æ¹ý¿¡¼­ ¸ñÇ¥ ³¯Â¥ ÀÔ·Â(Á¾·áÀÏÀÚ) ¹æ½ÄÀ¸·Î ¹Ù²Ù±â À§ÇØ Ãß°¡
check_dday_list:
	.dw	0,0,28,59,89,120,150,181,212,242,273,303,334

display_dday_common1:
	push	r12	; 2010/11/11 Ãß°¡
	push	r13
	pusw	x
	pusw	y
	pusw	z
check_dday:
	set

;	brts	PC+4
;	ldiw	z,ram_date_day+2+1
;	rjmp	PC+3
	ldiw	x,rom_dday_date_day+2+1
	ldi	loop_count,3	; convert hex to decimal
	ldi	tmp3,10
;	ld	tmp,-z	; load from sram
	ldi	tmp4,6
	brtc	PC+5
	sbiw	x,1
	call	eep_read
	rjmp	PC+4

	mov	tmp,tmp4
	call	rtc_read

	cpi	loop_count,0
	brne	PC+3
	sts	ram_process_buffer,tmp
	dec	tmp4

	mov	tmp2,tmp
	swap	tmp
	andi	tmp,0x0f
	mul	tmp,tmp3
	andi	tmp2,0x0f
	add	r0,tmp2
	push	r0	; store to stack 3 times(year/month/day)
	dec	loop_count
	brne	PC-21

	clr	yH	; 
	pop	yL	; load day

	ldiw	z,check_dday_list*2
	pop	tmp2
	lsl	tmp2
	add	zL,tmp2
	adc	zH,zero
	lpm	tmp,z+
	lpm	tmp2,z

	add	yL,tmp
	adc	yH,tmp2

	pop	tmp
	mov	tmp2,tmp
	lsr	tmp2
	lsr	tmp2

	ldi	tmp3,low(365)
	ldi	tmp4,high(365)
	mul	tmp3,tmp
	movw	r24:r25,r0:r1
	mul	tmp4,tmp
	add	r24,r1
	adc	r25,r0
	add	r24,tmp2
	adc	r25,zero
	add	yL,r24
	adc	yH,r25

	lds	tmp,ram_process_buffer
;	brts	PC+4
;.DW	0;	lds	tmp,ram_date_year
;	rjmp	PC+3
;.DW	0;	lds	tmp,ram_dday_date_year
	sbrc	tmp,4	; 2010/11/01 ¼öÁ¤
	rjmp	PC+9	; 10 order year : even
	andi	tmp,0x0f
	cpi	tmp,0x00	; 10 order year : odd
	breq	PC+11
	cpi	tmp,0x04
	breq	PC+9
	cpi	tmp,0x08
	breq	PC+7
	rjmp	PC+7
	andi	tmp,0x0f
	cpi	tmp,0x02
	breq	PC+3
	cpi	tmp,0x06
	brne	PC+2
	adiw	y,1

	brtc	PC+4
	movw	r12:r13,y
	clt
	rjmp	check_dday+1
	sub	r12,yL
	sbc	r13,yH
	

	clr	r25
	sbrs	r13,7
	rjmp	PC+7

	com	r12	; 16bit 2's complement
	com	r13
	ldi	tmp,1
	ldi	r25,10
	add	r12,tmp
	adc	r13,zero

	popw	z
	popw	y

	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 1
	rcall	put_alpha_byte	; 2
	rcall	put_alpha_byte	; 3
	rcall	put_alpha_byte	; 4
	rcall	put_alpha_byte	; 5

	ldi	tmp,high(1000)	; D-DAY ȤÀº RUNNING ÀÏÀÌ 999ÀÏÀÌ ³ÑÀ¸¸é ---À» Ç¥½Ã
	ldi	tmp2,low(1000)
	cp	r12,tmp2
	cpc	r13,tmp
	brcs	PC+6

	ldi	tmp,0x10
	rcall	put_alpha_byte	; 6
	rcall	put_alpha_byte	; 7
	rcall	put_alpha_byte	; 8
	rjmp	PC+26

	movw	tmp3:tmp4,r12:r13
	ldi	tmp,10
	rcall	div8_a
	push	tmp4

	clr	tmp4
	ldi	tmp,10
	rcall	div8_a


	mov	tmp,tmp3
	andi	tmp,0x0f
	brne	PC+4
	in	tmp,SREG
	bst	tmp,SREG_Z
	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 6

	mov	tmp,tmp4
	andi	tmp,0x0f
	brne	PC+2
	brts	PC+5
	rcall	put_alpha_byte	; 7

	pop	tmp
	andi	tmp,0x0f
;	rcall	put_alpha_byte	; 8
	rjmp	PC+5
; 2010/04/17 À̹ÎÁÖ
; D-DAY°¡ 10 ÀÌÇÏÀÏ °æ¿ì °¡¿îµ¥ Ç¥½ÃÇÕ´Ï´Ù.
; If less than 10, will display in the middle.
	pop	tmp
	andi	tmp,0x0f
	rcall	put_alpha_byte	; 7

	ldi	tmp,0x0a
	rcall	put_alpha_byte	; 8

	popw	x
	
	ldi	tmp3,0
	ldiw	z,display_dday*2-20
	add	zL,r25
	adc	zH,zero
	call	string_small_type2
	pop	r13
	pop	r12
	ret



;------------------------------------------------
;	16-Bit / 8-Bit = 8-Bit Unsigned Division
;	(tmp4:tmp3 / tmp --> Q = tmp3, R = tmp4)
;------------------------------------------------
DIV8_a:
	PUSH	R0			; quotient
	PUSH	R1			; remainder
	PUSH	R12

	CLR	R1			; loop_countear remainder
	CLR	R12
	CLR	zero			; loop_countear zero vtmp3ue register

	LDI	loop_count,16			; loop counter
DIV8A_a:	LSL	tmp3			; shift dividend by 1 bit to left
	ROL	tmp4
	ROL	R1
	ROL	R12
	CP	R12,zero			; remainder >= divisor ?
	BRNE	DIV8B_a
	CP	R1,tmp
	BRLO	DIV8C_a
DIV8B_a:	SUB	R1,tmp			; if yes, remainder - divisor
	SBC	R12,zero			;   and shift 1 into quotient
	SEC
	RJMP	DIV8D_a
DIV8C_a:	CLC			; if no, shift 0 into quotient
DIV8D_a:	ROL	R0			; shift quotient by 1 bit to left
	DEC	loop_count
	BRNE	DIV8A_a

	MOV	tmp4,R1			; make remainder
	MOV	tmp3,R0			; make quotient

	POP	R12
	POP	R1
	POP	R0
	ret




; ¸ÞÀÎ ¸Þ´º ¼øȯ
; main menu loop
menu_main_entry:
	call	eff_curtain_off
	call	clear_all
	ldi	tmp4,1
	clr	menu_select
menu_main:
	sbi	UCSRB,RXCIE

	ldi	tmp,1
	sts	menu_sub_display_msg_src_cnt,tmp

	ldi	tmp,6	; 2010/11/11 ¹üÀ§ ¹Ù±ùÀÇ °ªÀÌ ¹ß°ß½Ã(Äü¸Þ¸ð ÁøÀÔ µî) ¸ÞÀÎÀ¸·Î À̵¿
	cp	menu_select,tmp
	brcs	PC+2

	rjmp	display_main_enter

	call	clear_2line_yellow
	call	big_yellow_string_lower
	ldi	tmp3,2
	ldiw	x,ram_data_red+64+8
	ldiw	z,menu_main_sel*2
	call	string_small
	ldiw	x,ram_data_green_lower
	ldiw	z,menu_main_list*2
	ldi	tmp,20
	mul	menu_select,tmp
	add	zL,r0
	adc	zH,r1	
	call	string_small
	adiw	z,10
	ldiw	x,ram_data_red_lower
	call	string_small
	call	eff_change_scroll_left_line1
menu_main_loop:

	call	clear_2line_yellow
	ldi	tmp3,2	
	ldiw	x,ram_data_red+64+8
	ldiw	z,yes_no_menu*2
	call	string_small

	andi	tmp4,0x01
	ldi	tmp,0x9b

	brne	PC+9
	ldiw	x,ram_data_green+64+9
	ldi	tmp3,4
	call	put_small
	ldiw	x,ram_data_red+64+9
	rjmp	PC+8

	ldiw	x,ram_data_green+64+13
	ldi	tmp3,6
	call	put_small

	ldiw	x,ram_data_red+64+13
	ldi	tmp,0x7e
	call	put_small

menu_main_loop_not_clear:
;	call	check_alarm
	call	check_brightness

	ldi	tmp,7
	call	wait_ms

	rcall	menu_out_count

	ldiw	z,menu_main_address*2
	ldi	tmp,2
	mul	menu_select,tmp
	add	zL,r0
	adc	zH,r1
	lpm	tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2

; IR¸®¸ðÄÁ ó¸®
	cpi	remote_data,ir_ent
	brne	PC+3
	ldi	key_count,255
	rjmp	menu_main_ent
	cpi	remote_data,ir_esc
	breq	menu_main_esc
	cpi	remote_data,ir_right
	breq	menu_main_inc
	cpi	remote_data,ir_inc
	breq	menu_main_inc
	cpi	remote_data,ir_dec
	breq	menu_main_dec
	cpi	remote_data,ir_left
	breq	menu_main_dec

	call	key_check_key_only
	cpi	tmp,key_ent
	brne	PC+16
menu_main_ent:
	ldi	remote_data,0xff
	call	sound_entry
	andi	tmp4,0x01
	breq	PC+7
	mov	tmp,menu_select
	cpi	tmp,4	; ÃÖ´ë ¸Þ´º ¹üÀ§
	brcs	PC+2
	rjmp	menu_main-1
	inc	menu_select
	rjmp	menu_main
	call	eff_curtain_off
	clr	menu_position
	ijmp
	cpi	tmp,key_dec
	brne	PC+4
menu_main_dec:
	call	sound_decrease
	rjmp	PC+5
	cpi	tmp,key_inc
	brne	PC+6
menu_main_inc:
	call	sound_increase
	ldi	remote_data,0xff
	inc	tmp4
	rjmp	menu_main_loop
	cpi	tmp,key_esc
	breq	PC+2
	rjmp	menu_main_loop_not_clear
menu_main_esc:
	ldi	remote_data,0xff
	touch_off
	call	sound_pass
	touch_on
	rjmp	display_main_enter



menu_sub_upper_msg:

	lpm	tmp,z+
	pusw	x
	pusw	y
	pusw	z
	adiw	x,7
	movw	y,x
	ldi	tmp2,121
	add	yL,tmp2
	adc	yH,zero
	ldiw	z,(font_5x8-(4*32))*2
	ldi	loop_count,8
	ldi	tmp2,8
	mul	tmp,tmp2
	add	zL,r0
	adc	zH,r1
	ldi	tmp3,0xff
	lpm	tmp4,z+
	ldi	tmp,6
	sec
	rol	tmp4
	rol	tmp3
	dec	tmp
	brne	PC-4
	ld	tmp,x
	and	tmp3,tmp
	st	x,tmp3
	adiw	x,8
	ld	tmp2,y
	and	tmp4,tmp2
	st	y,tmp4
	adiw	y,8
	dec	loop_count
	brne	PC-17

	popw z
	popw y
	popw x
	ret

menu_sub_entry:
;	cbi	UCSRB,RXCIE

	ldiw	z,set_load_value_list*2
	mov	tmp,menu_select
	lsl	tmp
	add	zL,tmp
	adc	zH,zero
	lpm	yL,z+
	lpm	yH,z
	movw	z,y
	ldiw	y,menu_value
	icall

menu_sub_ready:
	rcall	big_yellow_string_lower
menu_sub_ready_incdec:
	rcall	clear_2line_yellow

menu_sub_loop:
	rcall	menu_out_count

	ldi	tmp,14
	cp	line_select,tmp
	brne	PC-1
;	brcc	PC+2
;	rjmp	pos_a
	lds	tmp2,menu_sub_display_msg_src_cnt
	dec	tmp2
	sts	menu_sub_display_msg_src_cnt,tmp2
	brne	PC+3
;	ldi	tmp,0
;	sts	menu_sub_display_msg_src_cnt,tmp
	rcall	clear_1line_yellow
	rjmp	pos_c
	cpi	tmp2,192
	brcc	pos_c
	cpi	tmp2,64
;	sbrs	tmp2,1	; speed 1/2
	brcc	pos_b
	rjmp	pos_a
pos_c:
;	sts	menu_sub_display_msg_src_cnt,zero	; = 256
; ¸Þ´º ³»¿¡¼­ »ó´Ü ¼³¸í Ç¥½Ã
	ldiw	z,set_msg_upper_addr_list*2
	mov	tmp,menu_select
	lsl	tmp
	add	zL,tmp
	adc	zH,zero
	lpm	yL,z+
	lpm	yH,z
	ldi	tmp,42
	mul	menu_position,tmp
	add	yL,r0
	adc	yH,r1
	movw	z,y
	ldiw	x,ram_data_green
	call	string_small
	adiw	z,10

	rcall	menu_sub_upper_msg

	ldiw	x,ram_data_green_lower
	call	string_small_type2
	adiw	z,10
	ldiw	x,ram_data_red
	call	string_small
	adiw	z,10
	rcall	menu_sub_upper_msg
	ldiw	x,ram_data_red_lower
	call	string_small_type2
	rjmp	pos_a
pos_b:
	ldi	loop_count,64
	ldiw	x,ram_data_green_lower
	ldiw	y,ram_data_red_lower
	ld	tmp,x+
	ld	tmp2,y+
	cpi	tmp,0xff
	brne	PC+9
	cpi	tmp2,0xff
	brne	PC+7
	dec	loop_count
	brne	PC-7
	ldi	tmp,63
	sts	menu_sub_display_msg_src_cnt,tmp
	rjmp	pos_a


	ldi	loop_count,2
	ldiw	x,ram_data_green_lower+8
	ldi	r23,8
	movw	z,x
	movw	y,x
	subi	yL,128
	sbci	yH,0
	sec
	ldi	r25,8
	ld	tmp,-x
	rol	tmp
	st	x,tmp
	dec	r25
	brne	PC-4
	ldi	r25,8
	ld	tmp,-y
	rol	tmp
	st	y,tmp
	dec	r25
	brne	PC-4
	movw	x,z
	adiw	x,8
	dec	r23
	brne	PC-20
	ldiw	x,ram_data_red_lower+8
	dec	loop_count
	brne	PC-25

pos_a:

	movw	tmp:tmp2,menu_select:menu_position
	lsl	tmp
	lsl	tmp2

; ¼øȯ½Ã È­¸é ¾Æ·§ÁÙ¿¡ ¼³Á¤°ª »Ñ·ÁÁÙ ·çƾ ÁÖ¼Ò ·Îµå
	ldiw	z,set_disp_value_addr_list*2
	ldiw	y,menu_value
	add	zL,tmp
	adc	zH,zero
	lpm	xL,z+
	lpm	xH,z
	movw	z,x
	add	zL,tmp2
	adc	zH,zero
	lpm	xL,z+
	lpm	xH,z
	movw	z,x

	icall

	movw	tmp:tmp2,menu_select:menu_position
	lsl	tmp
	lsl	tmp2
; INC/DEC Å° Á¶À۽à ó¸®ÇÒ ·çƾ¿¡ ÇÊ¿äÇÑ ·¥ ÁÖ¼Ò ·Îµå
	ldiw	z,set_process_ram_addr_list*2
	add	zL,tmp	; *2
	adc	zH,zero
	lpm	yL,z+
	lpm	yH,z
	movw	z,y
	add	zL,tmp2
	adc	zH,zero
	lpm	yL,z+
	lpm	yH,z

; INC/DEC Å° Á¶À۽à ó¸®ÇØ¾ß ÇÒ ·çƾ ÁÖ¼Ò¸¦ ·Îµå
	ldiw	z,set_process_addr_list*2
	lsl	tmp2
	add	zL,tmp
	adc	zH,zero
	lpm xL,z+
	lpm	xH,z
	movw	z,x
	add	zL,tmp2
	adc	zH,zero

	ldi	tmp,4
	call	wait_ms

	cpi	remote_data,ir_ent
	brne	PC+2
	rjmp	menu_sub_end
	cpi	remote_data,ir_esc
	brne	PC+3
	clr	menu_position
	rjmp	menu_sub_esc
	cpi	remote_data,ir_right
	breq	menu_sub_ent
	cpi	remote_data,ir_inc
	breq	menu_sub_inc
	cpi	remote_data,ir_dec
	breq	menu_sub_dec
	cpi	remote_data,ir_left
	breq	menu_sub_esc

	cpi	remote_data,10
	mov	tmp,remote_data
	brcc	PC+4
	call	sound_pass
	rjmp	menu_sub_num

	call	key_check_key_only
	cpi	tmp,key_ent
	brne	PC+17
menu_sub_ent:
	call	sound_pass
	ldi	remote_data,0xff
	ldiw	z,set_ref_value_end_pos_list*2
	add	zL,menu_select
	adc	zH,zero
	lpm	tmp,z
	cp	menu_position,tmp
	brne	PC+2
	rjmp	menu_sub_end
	inc	menu_position
	ldi	tmp,1
	sts	menu_sub_display_msg_src_cnt,tmp
	rjmp		menu_sub_ready

	cpi	tmp,key_inc
	brne	PC+4
menu_sub_inc:
	call	sound_increase
	rjmp	PC+6

	cpi	tmp,key_dec
menu_sub_dec:
	brne	PC+14
	call	sound_decrease

	adiw	z,2

	ldi	remote_data,0xff

menu_sub_num:
	lpm tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2

	ld	tmp,y
	mov	tmp2,tmp
	icall
	st	y,tmp

	ldi	remote_data,0xff
	rjmp	menu_sub_ready_incdec

	cpi	tmp,key_esc
	breq	PC+2
	rjmp	menu_sub_loop
menu_sub_esc:
	ldi	remote_data,0xff
	tst	menu_position
	brne	PC+4
	call	sound_pass
	rjmp	menu_main
	dec	menu_position

	call	sound_pass
	ldi	tmp,1
	sts	menu_sub_display_msg_src_cnt,tmp
	rjmp	menu_sub_ready


menu_out_count:
	ldiw	y,ms_count
	ldd	xL,y+0
	ldd	xH,y+1
	sbiw	x,1
	breq	PC+4
	std	y+0,xL
	std	y+1,xH
	ret
;	rcall	sound_pass_on
;	jmp	display_main_enter

	rcall	big_yellow_string_lower
	ldiw	y,ram_data_red_lower
	call	draw_circle

	ldiw	z,menu_out_count_msg*2
	ldi	tmp3,2
	ldiw	x,ram_data_red+32+128
	call	string_small

	call	eff_change_scroll_left_all

	call	sound_fail

	call	delay_alert_view

	clr	quick_memo_flag

	jmp	display_main_enter



; 2010/11/06 ¸®¸ðÄÁ ¼ýÀÚ¹öÆ° ó¸®
set_process_ir_10num_input:
	cpi	remote_data,0xff
	breq	set_process_ir_cancle+2
	swap	remote_data
	andi	tmp,0x0f
	or	tmp,remote_data
	inc	menu_position
	rjmp	set_process_ir_cancle-3	; ¾Æ·¡ ·çƾ ¼öÁ¤½Ã ÂüÁ¶

set_process_ir_1num_input:
	cpi	remote_data,0xff
	breq	PC+6
	andi	tmp,0xf0
	or	tmp,remote_data
	inc	menu_position

	pop	tmp2
	pop	tmp2
	ret

set_process_ir_cancle:
	cpi	remote_data,0xff
	brne	PC-4
	ret

set_process_clock_10year_inc:
set_process_dday_10year_inc:
	rcall	set_process_ir_10num_input

	andi	tmp2,0xf0
	cpi	tmp2,0x90
	brne	PC+3
	andi	tmp,0x0f
	ret
	ldi	tmp2,0x10
	add	tmp,tmp2
	ret

set_process_clock_10year_dec:
set_process_dday_10year_dec:
	andi	tmp2,0xf0
	cpi	tmp,0x00
	brne	PC+3
	ori	tmp,0x90
	ret
	subi	tmp,0x10
	ret
	


set_process_clock_1year_inc:
set_process_clock_1minute_inc:
set_process_alarm_1minute_inc:
set_process_dday_1year_inc:
	rcall	set_process_ir_1num_input

	andi	tmp2,0x0f
	cpi	tmp2,0x09
	brne	PC+3
	andi	tmp,0xf0
	ret
	inc	tmp
	ret

set_process_clock_1year_dec:
set_process_clock_1minute_dec:
set_process_alarm_1minute_dec:
set_process_dday_1year_dec:
	andi	tmp2,0x0f
	cpi	tmp2,0x00
	brne	PC+3
	ori	tmp,0x09
	ret
	dec	tmp
	ret

set_process_clock_10hour_inc:
set_process_alarm_10hour_inc:
	rcall	set_process_ir_10num_input

	cpi	tmp,0x20
	brcs	PC+3
	andi	tmp,0x0f
	ret
	ldi	tmp2,0x10
	add	tmp,tmp2
	cpi	tmp,0x24
	brcs	PC+2
	ldi	tmp,0x23
	andi	tmp,0x3f
	ret


set_process_clock_10hour_dec:
set_process_alarm_10hour_dec:
	rcall	set_process_ir_10num_input

	andi	tmp2,0xf0
	cpi	tmp2,0x00
	brne	PC+8
	ldi	tmp2,0x20
	andi	tmp,0x0f
	add	tmp,tmp2
	cpi	tmp,0x24
	brcs	PC+2
	ldi	tmp,0x23
	ret
	subi	tmp,0x10
	ret

set_process_alarm_1hour_inc:
set_process_clock_1hour_inc:
	rcall	set_process_ir_1num_input

	sbrc	tmp2,5
	rjmp	PC+8
	andi	tmp2,0x0f
	cpi	tmp2,0x09
	brne	PC+3
	andi	tmp,0xf0
	rjmp	PC+7
	inc	tmp
	rjmp	PC+5
	andi	tmp2,0x0f
	cpi	tmp2,0x03
	brne	PC-4
	andi	tmp,0xf0
	ret

set_process_alarm_1hour_dec:
set_process_clock_1hour_dec:
	sbrc	tmp2,5
	rjmp	PC+8
	andi	tmp2,0x0f
	cpi	tmp2,0x00
	brne	PC+3
	ori	tmp,0x09
	rjmp	PC+7
	dec	tmp
	rjmp	PC+5
	andi	tmp2,0x0f
	cpi	tmp2,0x00
	brne	PC-4
	ori	tmp,0x03
	ret


set_process_clock_10month_inc:
set_process_clock_10month_dec:
set_process_dday_10month_inc:
set_process_dday_10month_dec:
	rcall	set_process_ir_10num_input

	sbrc	tmp2,4
	rjmp	PC+8
	andi	tmp2,0x0f	; 0x
	cpi	tmp2,0x02+1
	brcs	PC+3
	ldi	tmp,0x12
	rjmp	PC+4
	ori	tmp,0x10
	rjmp	PC+2
	andi	tmp,0x0f
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x01
	ret
	

set_process_clock_1month_inc:
set_process_dday_1month_inc:
	rcall	set_process_ir_1num_input

	sbrc	tmp2,4
	rjmp	PC+8
	andi	tmp2,0x0f
	cpi	tmp,0x09
	brne	PC+3
	ldi	tmp,0x01
	rjmp	PC+7
	inc	tmp
	rjmp	PC+5
	andi	tmp2,0x0f
	cpi	tmp2,0x02
	brne	PC-4
	andi	tmp,0xf0
	ret


set_process_clock_1month_dec:
set_process_dday_1month_dec:
	sbrc	tmp2,4
	rjmp	PC+8
	andi	tmp2,0x0f
	cpi	tmp2,0x01
	brne	PC+3
	ori	tmp,0x09
	ret
	dec	tmp
	ret
	andi	tmp2,0x0f
	cpi	tmp2,0x00
	brne	PC-4
	ori	tmp,0x02
	ret
	

set_process_clock_10date_inc:
set_process_dday_10date_inc:
	rcall	set_process_ir_10num_input

	rcall	intercalay_check
	andi	tmp4,0xf0
	andi	tmp2,0xf0
	cp	tmp2,tmp4
	brne	PC+3
	andi	tmp,0x0f
	rjmp	PC+6
	ldi	tmp2,0x10
	add	tmp,tmp2
	cp	tmp,tmp3
	brcs	PC+2
	mov	tmp,tmp3
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x01
	ret


set_process_clock_10date_dec:
set_process_dday_10date_dec:
	rcall	intercalay_check
	andi	tmp2,0xf0
	cpi	tmp2,0x00
	brne	PC+7
	andi	tmp4,0xf0
	or	tmp,tmp4
	cp	tmp,tmp3
	brcs	PC+2
	mov	tmp,tmp3
	ret
	subi	tmp,0x10
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x01
	ret


set_process_clock_1date_inc:
set_process_dday_1date_inc:
	rcall	set_process_ir_1num_input

	rcall	intercalay_check
	andi	tmp2,0xf0
	andi	tmp4,0xf0
	cp	tmp2,tmp4
	mov	tmp2,tmp
	breq	PC+11
	andi	tmp2,0x0f
	cpi	tmp2,0x09
	breq	PC+3
	inc	tmp
	ret
	andi	tmp,0xf0
	cpi	tmp,0x00
	brne	PC+2
	ldi	tmp,0x01
	ret
	andi	tmp2,0x0f
	andi	tmp3,0x0f
	cp	tmp2,tmp3
	brcs	PC-10
	rjmp	PC-9


set_process_clock_1date_dec:
set_process_dday_1date_dec:
	rcall	intercalay_check
	cpi	tmp2,0x01
	breq	PC+10
	andi	tmp2,0x0f
	cpi	tmp2,0x00
	brne	PC+5
	andi	tmp4,0x0f
	andi	tmp,0xf0
	or	tmp,tmp4
	ret
	dec	tmp
	ret
	ori	tmp,0x09
	ret


set_process_clock_10minute_inc:
set_process_alarm_10minute_inc:
	rcall	set_process_ir_10num_input

	andi	tmp2,0xf0
	cpi	tmp2,0x50
	brne	PC+3
	andi	tmp,0x0f
	ret
	ldi	tmp2,0x10
	add	tmp,tmp2
	ret

set_process_clock_10minute_dec:
set_process_alarm_10minute_dec:
	andi	tmp2,0xf0
	cpi	tmp,0x00
	brne	PC+3
	ori	tmp,0x50
	ret
	subi	tmp,0x10
	ret


set_process_clock_second_inc:
set_process_clock_second_dec:
;	tst	remote_data
;	brne	PC+2
	clr	tmp
	ret


set_process_alarm_mode_inc:
	rcall	set_process_ir_cancle

	cpi	tmp,0x04
	brcs	PC+3
	clr	tmp
	ret
	inc	tmp
	ret

set_process_alarm_mode_dec:
	cpi	tmp,0x00
	breq	PC+3
	dec	tmp
	ret
	ldi	tmp,0x04
	ret

set_process_alarm_chime_inc:
	cpi	tmp,2
	breq	PC+3
	inc	tmp
	ret
	ldi	tmp,0
	ret

set_process_alarm_chime_dec:
	cpi	tmp,0
	breq	PC+3
	dec	tmp
	ret
	ldi	tmp,2
	ret

set_process_alarm_chimetype_inc:
set_process_alarm_chimetype_dec:
	rcall	set_process_ir_cancle
	com	tmp2
	bst	tmp2,0
	bld	tmp,0
	ret

set_process_dday_message_inc:
	rcall	set_process_ir_cancle

	cpi	tmp,0x7f
	breq	PC+3
	inc	tmp
	ret
	ldi	tmp,0x20
	ret

set_process_dday_message_dec:
	cpi	tmp,0x20
	breq	PC+3
	dec	tmp
	ret
	ldi	tmp,0x7f
	ret

set_process_display_night_inc:
set_process_display_day_inc:
set_process_display_manual_inc:
	rcall	set_process_ir_cancle

	cpi	tmp,0x07
	brcs	PC+3
	ldi	tmp,0
	ret
	inc	tmp
	ret


set_process_display_waittime_inc:
	rcall	set_process_ir_cancle

	cpi	tmp,0x04
	brcs	PC+3
	ldi	tmp,1
	ret
	inc	tmp
	ret

set_process_display_waitdate_inc:
set_process_display_waittemp_inc:
set_process_display_waitdday_inc:
set_process_display_waitlogo_inc:
	rcall	set_process_ir_cancle

	cpi	tmp,0x04
	brcs	PC+3
	clr	tmp
	ret
	inc	tmp
	ret

set_process_display_night_dec:
set_process_display_day_dec:
set_process_display_manual_dec:
	cpi	tmp,0x00
	brne	PC+3
	ldi	tmp,0x07
	ret
	dec	tmp
	ret

set_process_display_10cds_inc:
	rcall	set_process_ir_cancle

	ldi	tmp2,0x10
	add	tmp,tmp2
	ret

set_process_display_10cds_dec:
	subi	tmp,0x10
	ret



set_process_display_cds_dec:
	dec	tmp2
	rjmp	PC+3
set_process_display_cds_inc:
	rcall	set_process_ir_cancle

	inc	tmp2
	andi	tmp2,0x0f
	andi	tmp,0xf0
	add	tmp,tmp2
	ret


set_process_display_waittime_dec:
	cpi	tmp,0x01
	breq	PC+3
	dec	tmp
	ret
	ldi	tmp,0x04
	ret

set_process_display_waitdate_dec:
set_process_display_waittemp_dec:
set_process_display_waitdday_dec:
set_process_display_waitlogo_dec:
	cpi	tmp,0x00
	breq	PC+3
	dec	tmp
	ret
	ldi	tmp,0x04
	ret

set_process_display_dotact_inc:
set_process_display_dotact_dec:
	rcall	set_process_ir_cancle
	com	tmp2
	bst	tmp2,7
	bld	tmp,7
	sts	ram_brightness_mode,tmp
	ret

set_process_display_mode_inc:
set_process_display_font_inc:
	andi	tmp2,0x84
	rcall	set_process_ir_cancle

	andi	tmp,0x03
	cpi	tmp,0x03
	brcs	PC+3
	clr	tmp
	rjmp	PC+2
	inc	tmp
	andi	tmp,~0x84
	or	tmp,tmp2
	ret

set_process_display_mode_dec:
set_process_display_font_dec:
	andi	tmp2,0x84
	andi	tmp,0x03
	cpi	tmp,0x00
	breq	PC+3
	dec	tmp
	rjmp	PC+2
	ldi	tmp,0x03
	andi	tmp,~0x84
	or	tmp,tmp2
	ret

set_process_display_eff_inc:
	cpi	tmp,4
	brne	PC+3
	ldi	tmp,0
	ret
	inc	tmp
	ret

set_process_display_eff_dec:
	tst	tmp
	breq	PC+3
	dec	tmp
	ret
	ldi	tmp,4
	ret

set_process_display_effspeed_inc:
	cpi	tmp,3
	brcc	PC+3
	inc	tmp
	ret
	ldi	tmp,1
	ret

set_process_display_effspeed_dec:
	cpi	tmp,1
	breq	PC+3	
	dec	tmp
	ret
	ldi	tmp,3
	ret


set_process_display_1224_inc:
set_process_display_1224_dec:
	rcall	set_process_ir_cancle
	com	tmp2
	bst	tmp2,2
	bld	tmp,2
	ret


set_process_dday_mode_inc:
	rcall	set_process_ir_cancle

	cpi	tmp,0x03
	brcs	PC+3
	clr	tmp
	ret
	inc	tmp
	ret

set_process_dday_mode_dec:
	cpi	tmp,0x00
	brne	PC+3
	ldi	tmp,0x03
	ret
	dec	tmp
	ret


set_process_game_select_inc:
set_process_game_select_dec:
	inc	tmp
	andi	tmp,1
	ret

set_process_quickmemo_inc:
	ldi	tmp2,9
	cp	menu_position,tmp2
	brcs	PC+2
	dec	menu_position
	mov	tmp2,tmp
	rcall	set_process_ir_1num_input
	andi	tmp2,0x0f
	cpi	tmp2,0x09
	brne	PC+3
	ldi	tmp,0
	ret
	inc	tmp
	ret


set_process_quickmemo_dec:
	andi	tmp2,0x0f
	cpi	tmp2,0x00
	brne	PC+3
	ldi	tmp,0x09
	ret
	dec	tmp
	ret


intercalay_check:
	push	tmp2
	lds	tmp2,menu_value+1;	lds	tmp2,ram_date_month
	ldi	tmp3,0x31	; initialize value 31
	cpi	tmp2,8
	brcs	PC+4
	sbrc	tmp2,0	; month : 8~12
	ldi	tmp3,0x30	; month : 8~12 even, else odd
	rjmp	PC+26
	cpi	tmp2,2
	breq	PC+4	; month : 2 (February)
	sbrs	tmp2,0	; month : 8~12
	ldi	tmp3,0x30	; month : 1, 3~7 even, else odd
	rjmp	PC+21
	lds	tmp2,menu_value+0;		lds	tmp2,ram_date_year
	sbrc	tmp2,4
	rjmp	PC+9	; 10 order year : even
	andi	tmp2,0x0f
	cpi	tmp2,0x00	; 10 order year : odd
	breq	PC+13
	cpi	tmp2,0x04
	breq	PC+11
	cpi	tmp2,0x08
	breq	PC+9
	rjmp	PC+6
	andi	tmp2,0x0f
	cpi	tmp2,0x02
	breq	PC+5
	cpi	tmp2,0x06
	breq	PC+3
	ldi	tmp3,0x28
	rjmp	PC+2
	ldi	tmp3,0x29
	pop	tmp2
	mov	tmp4,tmp3
	ret


set_process_clock_common_display_date:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+9
set_process_clock_common_display_date_loop:
	ldi	tmp3,0
	ldi	tmp,'2'
	ldi	tmp4,254
	rcall	put_small_blink

	ldi	tmp3,2
	ldi	tmp,'0'
	sbiw	x,1
	rcall	put_small_blink

;	lds	tmp,ram_date_year
	ldd	tmp,y+0
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,4
	ldi	tmp4,0
	rcall	put_small_blink

;	lds	tmp,ram_date_year
	ldd	tmp,y+0
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,6
	rcall	put_small_blink

	ldi	tmp3,0
	ldi	tmp,'/'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_date_month
	ldd	tmp,y+1
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,2
	ldi	tmp4,2
	sbiw	x,1
	rcall	put_small_blink

;	lds	tmp,ram_date_month
	ldd	tmp,y+1
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,4
	rcall	put_small_blink

	ldi	tmp3,6
	ldi	tmp,'/'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_date_day
	ldd	tmp,y+2
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,0
	ldi	tmp4,4
	rcall	put_small_blink

;	lds	tmp,ram_date_day
	ldd	tmp,y+2
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,2
	sbiw	x,1
	rcall	put_small_blink
	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+9
	rjmp	set_process_clock_common_display_date_loop
	ret


set_process_clock_common_display_clock:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+9
set_process_clock_common_display_clock_loop:
	ldi	tmp3,2
	ldi	tmp4,6
;	lds	tmp,ram_time_ampm
;	tst	tmp
;	ldd	tmp,y+4
;	andi	tmp,0x20
;	breq	pc+3
;	ldi	tmp,'P'
;	rjmp	PC+2
;	ldi	tmp,'A'
;	rcall	put_small_blink

;	ldi	tmp3,4
;	ldi	tmp4,6
;	ldi	tmp,'M'
;	rcall	put_small_blink

;	lds	tmp,ram_time_hour
	ldd	tmp,y+4
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,3
	ldi	tmp4,6
	rcall	put_small_blink

;	lds	tmp,ram_time_hour
	ldd	tmp,y+4
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,5
	rcall	put_small_blink

	ldi	tmp3,7
	ldi	tmp4,255
	ldi	tmp,':'
	rcall	put_small_blink

;	lds	tmp,ram_time_minute
	ldd	tmp,y+5
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,1
	sbiw	x,1
	ldi	tmp4,8
	rcall	put_small_blink

;	lds	tmp,ram_time_minute
	ldd	tmp,y+5
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,3
	rcall	put_small_blink

	ldi	tmp3,5
	ldi	tmp,':'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_time_second
	ldd	tmp,y+6
	swap	tmp
	andi	tmp,0x07
	ori	tmp,0x30
	ldi	tmp3,7
	ldi	tmp4,10
	rcall	put_small_blink
;	lds	tmp,ram_time_second
	ldd	tmp,y+6
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,1
	ldi	tmp4,10
	sbiw	x,1
	rcall	put_small_blink
	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+9
	rjmp	set_process_clock_common_display_clock_loop

	ret



set_process_alarm_common_display_clock:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+10
set_process_alarm_common_display_clock_loop:
	ldi	tmp3,2
	ldi	tmp4,0
;	lds	tmp,ram_alarm_ampm
;	ldd	tmp,y+3
;	tst	tmp
;	breq	PC+3
;	ldi	tmp,'P'
;	rjmp	PC+2
;	ldi	tmp,'A'
;	rcall	put_small_blink

;	ldi	tmp3,4
;	ldi	tmp,'M'
;	ldi	tmp4,0
;	rcall	put_small_blink

;	ldi	tmp,' '
;	ldi	tmp3,6
;	ldi	tmp4,255
;	rcall	put_small_blink

;	lds	tmp,ram_alarm_hour
	ldd	tmp,y+2
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,0
	ldi	tmp4,0
	rcall	put_small_blink

;	lds	tmp,ram_alarm_hour
	ldd	tmp,y+2
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,2
	sbiw	x,1
	rcall	put_small_blink

	ldi	tmp3,4
	ldi	tmp,':'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_alarm_minute
	ldd	tmp,y+1
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,6
	ldi	tmp4,2
	rcall	put_small_blink

;	lds	tmp,ram_alarm_minute
	ldd	tmp,y+1
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,0
	ldi	tmp4,3
	rcall	put_small_blink
	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+10
	rjmp	set_process_alarm_common_display_clock_loop
	ret


set_process_alarm_common_display_mode:
;	lds	tmp,ram_alarm_mode
	ldd	tmp,y+0
	ldi	tmp2,10
	mul	tmp,tmp2
	ldiw	z,set_process_alarm_common_display_mode_msg*2
	add	zL,r0
	adc	zH,r1
	ldi	tmp3,2

	sbis	PIND,PD7
	rjmp	PC+4
	call	clear_2line_red
	rjmp	PC+5

	ldiw	x,ram_data_red+64
	call	string_small

	ldiw	x,ram_data_green+64
	ldi	tmp3,2
	call	string_small
	ret



set_process_dday_common_display_date:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+9
set_process_dday_common_display_date_loop:
	ldiw	y,menu_value	; message ¼öÁ¤ ÈÄ µ¹¾Æ¿Ã °æ¿ì ´ëºñ
	ldi	tmp3,0
	ldi	tmp,'2'
	ldi	tmp4,255
	rcall	put_small_blink

	ldi	tmp3,2
	ldi	tmp,'0'
	ldi	tmp4,255
	sbiw	x,1
	rcall	put_small_blink

;	lds	tmp,ram_dday_date_year
	ldd	tmp,y+12
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,4
	ldi	tmp4,0
	rcall	put_small_blink

;	lds	tmp,ram_dday_date_year
	ldd	tmp,y+12
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,6
	ldi	tmp4,1
	rcall	put_small_blink

	ldi	tmp3,0
	ldi	tmp,'/'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_dday_date_month
	ldd	tmp,y+11
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,2
	ldi	tmp4,2
	sbiw	x,1
	rcall	put_small_blink

;	lds	tmp,ram_dday_date_month
	ldd	tmp,y+11
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,4
	ldi	tmp4,3
	rcall	put_small_blink

	ldi	tmp3,6
	ldi	tmp,'/'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_dday_date_day
	ldd	tmp,y+10
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,0
	ldi	tmp4,4
	rcall	put_small_blink

;	lds	tmp,ram_dday_date_day
	ldd	tmp,y+10
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,2
	ldi	tmp4,5
	sbiw	x,1
	rcall	put_small_blink
	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+9
	rjmp	set_process_dday_common_display_date_loop
	ret


set_process_dday_common_display_message:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+9
set_process_dday_common_display_message_loop:
	ldiw	y,menu_value+10
;	mov	tmp,menu_position
;	subi	tmp,6
;	add	yL,tmp
;	adc	yH,zero

	ldi	tmp4,6
	ldi	tmp3,0
	cpi	tmp3,2
	brne	PC+2
	sbiw	x,1
	ld	tmp,-y
	rcall	put_small_blink
	cpi	tmp3,6
	brne	PC+3
	clr	tmp3
	rjmp	PC+3
	inc	tmp3
	inc	tmp3
	cpi	tmp4,16
	brne	PC-12


	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+9
	rjmp	set_process_dday_common_display_message_loop

	ret

/*
set_process_disp_common_display_adc:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+8
set_process_disp_common_display_adc_loop:
	ldi	tmp3,2
	ldi	tmp,' '
	ldi	tmp4,255
	rcall	put_small_blink

	ldi	tmp3,4
	ldi	tmp,' '
	ldi	tmp4,255
	rcall	put_small_blink

	ldd	tmp,y+3
	swap	tmp
	andi	tmp,0x0f
	cpi	tmp,0x0a
	brcc	PC+3
	ori	tmp,0x30
	rjmp	PC+3
	subi	tmp,0x09
	ori	tmp,0x40
	ldi	tmp3,6
	ldi	tmp4,5
	rcall	put_small_blink

	ldd	tmp,y+3
	andi	tmp,0x0f
	cpi	tmp,0x0a
	brcc	PC+3
	ori	tmp,0x30
	rjmp	PC+3
	subi	tmp,0x09
	ori	tmp,0x40
	ldi	tmp3,0
	ldi	tmp4,6
	rcall	put_small_blink

	ldi	tmp3,2
	ldi	tmp,'v'
	ldi	tmp4,255
	sbiw	x,1
	rcall	put_small_blink


	ldi	tmp,'s'
	ldi	tmp3,4
	ldi	tmp4,255
	rcall	put_small_blink


	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+8
	rjmp	set_process_disp_common_display_adc_loop


	rcall	check_cds
	push	tmp
	swap	tmp
	andi	tmp,0x0f
	cpi	tmp,0x0a
	brcc	PC+3
	ori	tmp,0x30
	rjmp	PC+3
	subi	tmp,0x09
	ori	tmp,0x40
	ldi	tmp3,6
	ldi	tmp4,255
	rcall	put_small_blink

	pop	tmp
	andi	tmp,0x0f
	cpi	tmp,0x0a
	brcc	PC+3
	ori	tmp,0x30
	rjmp	PC+3
	subi	tmp,0x09
	ori	tmp,0x40
	ldi	tmp3,0
	ldi	tmp4,255
	rcall	put_small_blink

	ldi	tmp,' '
	ldi	tmp3,2
	ldi	tmp4,255
	sbiw	x,1
	rcall	put_small_blink

	ldi	tmp,' '
	ldi	tmp3,4
	ldi	tmp4,255
	rcall	put_small_blink

	ret
*/

set_process_disp_common_display_dotact:
	ldiw	z,set_process_disp_common_display_dotact_msg*2
	ldd	tmp,y+0
	bst	tmp,7
	clr	tmp
	bld	tmp,0
	rjmp	set_process_select_msg


set_process_disp_common_display_1224:
	ldiw	z,set_process_disp_common_display_1224_msg*2
	ldd	tmp,y+0
	andi	tmp,0x04
	lsr	tmp
	lsr	tmp
	rjmp	set_process_select_msg

set_process_disp_common_display_mode:
	ldiw	z,set_process_disp_common_display_mode_msg*2
	ldd	tmp,y+0
	andi	tmp,0x03
	rjmp	set_process_select_msg


set_process_disp_common_display_bright_check:
	ldiw	z,set_process_disp_common_display_bright_check_list*2
	add	zL,tmp
	adc	zH,zero
	lpm	zL,z
	out	OCR0,zL
	ret

set_process_alarm_common_display_chimetype:
	ldd	tmp,y+4
	ldiw	z,set_process_alarm_common_display_chimetype_msg*2
	rjmp	set_process_select_msg

set_process_alarm_common_display_chime:
	ldd	tmp,y+3
	ldiw	z,set_process_alarm_common_display_chime_msg*2
	rjmp	set_process_select_msg

set_process_disp_common_display_night:
	ldd	tmp,y+1
	rcall	set_process_disp_common_display_bright_check
	ldiw	z,set_process_disp_common_display_degree_msg*2
	rjmp	set_process_select_msg
set_process_disp_common_display_day:
	ldd	tmp,y+2
	rcall	set_process_disp_common_display_bright_check
	ldiw	z,set_process_disp_common_display_degree_msg*2
	rjmp	set_process_select_msg
set_process_disp_common_display_manual:
	ldd	tmp,y+4
	rcall	set_process_disp_common_display_bright_check
	ldiw	z,set_process_disp_common_display_degree_msg*2
	rjmp	set_process_select_msg

set_process_disp_common_display_font:
	ldiw	z,set_process_disp_common_display_font_msg*2
	ldd	tmp,y+5
	rjmp	set_process_select_msg

set_process_disp_common_display_eff:
	ldiw	z,set_process_disp_common_display_eff_msg*2
	ldd	tmp,y+6
	rjmp	set_process_select_msg

set_process_disp_common_display_effspeed:
	ldiw	z,set_process_disp_common_display_effspeed_msg*2-10
	ldd	tmp,y+7
	rjmp	set_process_select_msg

set_process_disp_common_display_waittime:
	ldiw	z,set_process_disp_common_display_wait_msg*2
	ldd	tmp,y+8
	rjmp	set_process_select_msg

set_process_disp_common_display_waitdate:
	ldiw	z,set_process_disp_common_display_wait_msg*2
	ldd	tmp,y+9
	rjmp	set_process_select_msg

set_process_disp_common_display_waittemp:
	ldiw	z,set_process_disp_common_display_wait_msg*2
	ldd	tmp,y+10
	rjmp	set_process_select_msg

set_process_disp_common_display_waitdday:
	ldiw	z,set_process_disp_common_display_wait_msg*2
	ldd	tmp,y+11
	rjmp	set_process_select_msg

set_process_disp_common_display_waitlogo:
	ldiw	z,set_process_disp_common_display_wait_msg*2
	ldd	tmp,y+12
	rjmp	set_process_select_msg

set_process_alarm_common_remote_mode:
	ldiw	z,set_process_alarm_common_remote_mode_msg*2
	ldd	tmp,y+0
	rjmp	set_process_select_msg


set_process_game_select:
	ldiw	z,set_process_game_select_msg*2
	ldd	tmp,y+0
	rjmp	set_process_select_msg

set_process_game_jump:
	cli
	ldiw	x,RAMEND
	out	SPH,xH
	out	SPL,xL
	ldiw	z,set_process_game_jump_list*2
	ldd	tmp,y+0
	lsl	tmp
	add	zL,tmp
	adc	zH,zero
	lpm	tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2
	sei
	ijmp


set_process_select_msg:
	ldi	tmp2,10
	mul	tmp,tmp2
	add	zL,r0
	adc	zH,r1

	sbis	PIND,PD7
	rjmp	PC+4
	call	clear_2line_red
	rjmp	PC+6

	ldiw	x,ram_data_red+64
	ldi	tmp3,2
	call	string_small

	ldiw	x,ram_data_green+64
	call	string_small
	ret


set_process_quickmemo_common_display:
	ldi	loop_count,2
	ldiw	x,ram_data_green+64+9
set_process_quickmemo_common_display_loop:
	ldiw	y,menu_value
	ldi	tmp4,0
	ldi	tmp3,0
	cpi	tmp3,2
	brne	PC+2
	sbiw	x,1
	ld	tmp,y+
	rcall	put_small_blink
	cpi	tmp3,6
	brne	PC+3
	clr	tmp3
	rjmp	PC+3
	inc	tmp3
	inc	tmp3
	cpi	tmp4,10
	brne	PC-12

	dec	loop_count
	breq	PC+4
	ldiw	x,ram_data_red+64+9
	rjmp	set_process_quickmemo_common_display_loop

	ret

put_small_blink:
	cpi	loop_count,1
	brne	PC+8
	cp	tmp4,menu_position
	brne	PC+8
	sbis	PIND,PD7
	rjmp	PC+4
	call	clear_2line_red
	rjmp	PC+3
	call	put_small
	adiw	x,1
	inc	tmp4
	ret



menu_sub_end:
	rcall	big_yellow_string_lower
	ldiw	y,ram_data_green_lower
	rcall	draw_circle

/*
	ldiw	x,ram_data_green+8+8
	ldiw	y,ram_data_green+8
	ldiw	z,ram_data_green+8+120
	ldi	loop_count,16
	ldi	tmp,0x7f
	ldi	tmp2,0xfe
	st	x,tmp
	adiw	x,7
	st	x,tmp2
	adiw	x,1
	sbrs	loop_count,0
	rjmp	PC+3
	st	y+,zero
	st	z+,zero
	dec	loop_count
	brne	PC-9
*/
	ldi	tmp3,2
	ldiw	x,ram_data_green_lower+32
	ldiw	z,menu_sub_end_pass*2
	call	string_small
	ldiw	x,ram_data_red_lower+32
	call	string_small

	call	eff_change_scroll_left_all
	call	sound_sorting

	call	delay_alert_view

	ldiw	z,set_store_value_list*2
	mov	tmp,menu_select
	lsl	tmp
	add	zL,tmp
	adc	zH,zero
	lpm	yL,z+
	lpm	yH,z
	movw	z,y
	ldiw	y,menu_value
	icall

	sbi	UCSRB,RXCIE

	rcall	big_yellow_string_upper

	ldi	tmp3,2	
	ldiw	x,ram_data_red_upper+64+8
	ldiw	z,yes_no_menu*2
	call	string_small
	call	eff_change_scroll_down
	jmp	menu_main




set_load_value_clock:
	lds	tmp,ram_uart_rx_buffer+gps_retention
	cpi	tmp,'A'
	brne	PC+2
	rjmp	set_load_value_clock_fail

	ldi	tmp3,7
	dec	tmp3
	mov	tmp,tmp3
	call	rtc_read
	st	y+,tmp	; read data store
	tst	tmp3
	brne	PC-6
	ret


set_store_value_clock:
	ldi	tmp3,7
	dec	tmp3
	mov	tmp,tmp3
	ld	tmp2,y+
	call	rtc_write
	tst	tmp3
	brne	PC-6
	ret

set_load_value_clock_fail:
	ldiw	y,ram_data_red_lower
	rcall	draw_circle

	ldiw	z,set_load_value_clock_fail_msg*2
	
	rjmp	set_load_value_fail_common



set_load_value_alarm:
	ldiw	x,rom_alarm_mode
	call	eep_read
	st	y+,tmp
	adiw	x,1
	cpi	xL,low(rom_chime_type+1)
	brne	PC-5
	ret

set_store_value_alarm:
	ldiw	x,rom_alarm_mode
	ld	tmp,y+
	call	eep_write
	adiw	x,1
	cpi	xL,low(rom_chime_type+1)
	brne	PC-5
	ret

set_load_value_dday:
	ldiw	x,rom_dday_message
	call	eep_read
	st	y+,tmp
	adiw	x,1
	cpi	xL,low(rom_dday_date_year+1)
	brne	PC-5
	ret

set_load_value_game:
	st	y,zero
set_store_value_game:
	ret

set_store_value_dday:
	ldiw	x,rom_dday_message
	ld	tmp,y+
	call	eep_write
	adiw	x,1
	cpi	xL,low(rom_dday_date_year+1)
	brne	PC-5
	ret

set_load_value_remote:
	cpi	key_count,255
	brne	PC+2
	rjmp	set_load_value_remote_fail
	ldiw	x,rom_remocon_mode
	rcall	eep_read
	st	y,tmp
	ret

set_load_value_remote_fail:
	ldiw	y,ram_data_red_lower
	rcall	draw_circle

	ldiw	z,set_load_value_remote_fail_msg*2

set_load_value_fail_common:
	ldi	tmp3,2
	ldiw	x,ram_data_red+32+128
	call	string_small

	call	eff_change_scroll_left_all

	call	sound_fail

	rcall	delay_alert_view

	rcall	big_yellow_string_upper

	ldi	tmp3,2	
	ldiw	x,ram_data_red_upper+64+8
	ldiw	z,yes_no_menu*2
	call	string_small
	call	eff_change_scroll_down


	clr	tmp4
	pop	tmp
	pop	tmp
	jmp	menu_main


set_store_value_remote:
	ld	tmp,y
	ldiw	x,rom_remocon_mode
	call	eep_write
	ret


set_load_value_display:
	ldiw	x,rom_brightness_mode
	call	eep_read
	st	y+,tmp
	adiw	x,1
	cpi	xL,low(rom_alarm_mode)
	brne	PC-5
	ret

set_store_value_display:
	ldiw	x,rom_brightness_mode
	ld	tmp,y+
	call	eep_write
	adiw	x,1
	cpi	xL,low(rom_alarm_mode)
	brne	PC-5
	ret


set_load_value_quickmemo:
	ldiw	x,rom_quick_memo
	call	eep_read
	st	y+,tmp
	adiw	x,1
	cpi	xL,low(rom_quick_memo+10)
	brne	PC-5
	ret

set_store_value_quickmemo:
	cli
	ldiw	z,RAMEND
	out	SPH,zH
	out	SPL,zL
	sbi	UCSRB,RXCIE
	sei

	ldiw	x,rom_quick_memo
	cpi	xL,low(rom_quick_memo+10)
	breq	PC+5
	ld	tmp,y+
	rcall	eep_write
	adiw	x,1
	rjmp	PC-5

	jmp	display_main_enter

menu3_dday_msg_string:
	ldiw	y,rom_dday_message+9
	movw	z,x
	ldi	tmp3,2
	ldi	loop_count,10
	movw	x,y
	call	eep_read
	movw	x,z
	call	put_small
	cpi	tmp3,6
	brne	PC+3
	clr	tmp3
	rjmp	PC+5
	inc	tmp3
	inc	tmp3
	cpi	tmp3,2
	breq	PC+2
	adiw	z,1
	sbiw	y,1
	dec	loop_count
	brne	PC-17
	ret










tcn75_read:
	push	tmp
	ldi	tmp,(1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWEA)	; TWINT 1 write to clear
	rcall	twi_control

	pop	tmp
	push	tmp
;	ldi	tmp,0b10010000	; SLA+WR
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control

	ldi	tmp,0b00000000	; temperature register
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control

	ldi	tmp,(1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWEA)	;	restart
	rcall	twi_control

	pop	tmp
	ori	tmp,0x01
;	ldi	tmp,0b10010001	; SLA+RD
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control

	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	ldi	tmp2,0
	tst	loop_count
	breq	PC+2
	in	tmp2,TWDR

	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	ldi	tmp,0
	tst	loop_count
	breq	PC+2
	in	tmp,TWDR

	ldi	tmp3,(1<<TWINT)|(1<<TWSTO)|(1<<TWEN)|(1<<TWEA)
	out	TWCR,tmp3
	ret

rtc_write:
	push	loop_count
	push	tmp
	ldi	tmp,(1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWEA)	; TWINT 1 write to clear
	rcall	twi_control

	ldi	tmp,0b11010000	; SLA+WR
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control

	pop	tmp
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control

	out	TWDR,tmp2
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control

	ldi	tmp,(1<<TWINT)|(1<<TWSTO)|(1<<TWEN)|(1<<TWEA)
	out	TWCR,tmp
	pop	loop_count
	ret
	

rtc_read:
	push	loop_count
	push	tmp
	ldi	tmp,(1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWEA)	; TWINT 1 write to clear
	rcall	twi_control
	ldi	tmp,0b11010000	; SLA+WR
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	pop	tmp
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	ldi	tmp,(1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	ldi	tmp,0b11010001	; SLA+RE
	out	TWDR,tmp
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	ldi	tmp,(1<<TWINT)|(1<<TWEN)|(1<<TWEA)
	rcall	twi_control
	ldi	tmp,0
	tst	loop_count
	breq	PC+2
	in	tmp,TWDR
	pop	loop_count
	ret


twi_control:
	ldi	loop_count,250
	out	TWCR,tmp
	ldi	tmp,10
	rcall	wait_us
	dec	loop_count
	breq	PC+5
	in	tmp,TWCR
	sbrs	tmp,TWINT
	rjmp	PC-6
	ret
	pop	tmp
	pop	tmp
	ldi	tmp,1
	ret

; eeprom read
; data output = tmp, address input = z
eep_read:
	in	tmp,SREG
	bst	tmp,SREG_I
	cli
	sbic	EECR,EEWE
	rjmp	PC-1
	out	EEARH,xH
	out	EEARL,xL
	sbi	EECR,EERE
	in	tmp,EEDR
	brtc	PC+2
	sei
	ret

; eeprom write
; data input = tmp, address input = Z
eep_write:
	mov	tmp2,tmp
	rcall	eep_read
	cp	tmp,tmp2
	breq	PC+11
	cli
	sbic	EECR,EEWE
	rjmp	PC-1
	out	EEARH,xH
	out	EEARL,xL
	cbi	EECR,EEWE
	out	EEDR,tmp2
	sbi	EECR,EEMWE
	sbi	EECR,EEWE
	sei
	ret


sleep_mode:
	ldi	tmp2,esave_count
	sts	esave_count_buff,tmp2
	in	tmp2,OCR0
	rcall	key_check
	cpi	tmp,key_no
	brne	sleep_mode_cancel
	ldi	tmp,2
	rcall	wait_ms
	dec	tmp2
	cpi	tmp2,50
	brcc	PC+3
	ldi	tmp,4
	rcall	wait_ms
	out	OCR0,tmp2
	cpi	tmp2,0x00
	brne	PC-12

	rcall	clear_all

	ldi	tmp,100	; clear wait
	rcall	wait_ms

	ldi	tmp,0x07
	ldi	tmp2,0x00	; SQW Disable
	call	rtc_write

	sleep
	call	gmt_processor
	in	tmp,TIMSK
	andi	tmp,(0xff&(~((1<<TOIE0)|(1<<TOIE1))))	; led data off
	out	TIMSK,tmp
	sbi	PORTA,statu_led
	rcall	check_alarm
	ldi	tmp,20
	rcall	wait_ms
	
	out	OCR0,zero
	rcall	clear_all
	rcall	key_check
	cpi	tmp,key_no
	breq	PC-13

	ldi	tmp,0x07
	ldi	tmp2,0x90	; SQW Enable, 1Hz
	call	rtc_write



sleep_mode_cancel:



	clr	adc_count
	call	check_brightness
	tst	adc_count
	brne	PC-3



	cbi	PORTA,statu_led

	clr	key_count
	rcall	sound_pass

	rcall	check_brightness
	outi	TIMSK,timer1_interrupt_normal_mode	; timer/count 0 overflow interrupt enable, Timer Capture interrupt enable

	jmp	display_main_enter

key_check:
	ldi	tmp,key_no
	cpi	remote_data,0xff
	breq	PC+18
	cpi	remote_data,ir_esc
	brne	PC+3
	ldi	tmp,key_esc
	rjmp	PC+12
	cpi	remote_data,ir_dec
	brne	PC+3
	ldi	tmp,key_dec
	rjmp	PC+8
	cpi	remote_data,ir_inc
	brne	PC+3
	ldi	tmp,key_inc
	rjmp	PC+4
	cpi	remote_data,ir_ent
	brne	PC+4
	ldi	tmp,key_ent
	ser	key_count	; 0xff
	rjmp	PC+19
key_check_key_only:
	ldi	tmp,key_fil
	and	key_flag,tmp
	mov	tmp,key_flag
	cpi	tmp,key_no	; check old key
	breq	PC+12
	in	tmp,PINB	; key read
	andi	tmp,key_fil
	cp	key_flag,tmp
	brne	PC+8	; compare old key vs new key
	dec	key_count	; key count decrease
	breq	PC+4	; if, key count 0, key load
	cpi	key_count,200	; if, input key continue, key load continue
	brne	PC+5
	ldi	key_count,210
	mov	tmp,key_flag	; key load

	rjmp	PC+3
	ldi	key_count,7	; reset key count
	ldi	tmp,key_no
	in	key_flag,PINB	; key read
	ldi	remote_data,0xff
	ret


sound_entry:
	ldi	loop_count,2
	ldi	tmp,high(632)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(632)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	rcall	sound_ready
	ldi	tmp,30
	rcall	wait_ms
	rcall	sound_out
	ldi	tmp,20
	rcall	wait_ms
	dec	loop_count
	brne	PC-11
	ret


sound_alarm:
	rcall	sound_pass_on
	ldi	tmp,10
	rcall	wait_ms
	rcall	sound_pass
	ret

sound_oclock2:
	clr	key_count
	rcall	sound_entry
	touch_off
	ldi	tmp,250
	rcall	wait_ms
	touch_on
	ldi	tmp,250
	rcall	wait_ms
	ret
sound_oclock:
	clr	key_count
	ldi	tmp,high(632)	; timer counert 1 ctc mode top 632(speaker output only) 
	out	OCR1AH,tmp
	ldi	tmp,low(632)
	out	OCR1AL,tmp
	rcall	sound_ready
	ldi	tmp,250
	rcall	wait_ms
	rcall	sound_out
	touch_off
	ldi	tmp,250
	rcall	wait_ms
	touch_on
	ret

sound_pass_onA:


sound_pass_on:
	clr	key_count
sound_pass:
	ldi	tmp,high(632)	; timer counert 1 ctc mode top 632(speaker output only) 
	out	OCR1AH,tmp
	ldi	tmp,low(632)
	out	OCR1AL,tmp
	rcall	sound_ready
	ldi	tmp,30
	rcall	wait_ms
;	ldi	tmp,high(632*2)	; timer counert 1 ctc mode top 632(speaker output only) 
;	out	OCR1AH,tmp
;	ldi	tmp,low(632*2)
;	out	OCR1AL,tmp
;	ldi	tmp,30
;	rcall	wait_ms
	rcall	sound_out
	ret


sound_sorting:
	ldi	tmp,high(1910)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(1910)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	rcall	sound_ready
	ldi	tmp,90
	rcall	wait_ms
	ldi	tmp,high(1516)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(1516)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	ldi	tmp,90
	rcall	wait_ms
	ldi	tmp,high(1275)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(1275)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	ldi	tmp,90
	rcall	wait_ms
	rcall	sound_out
	ret


sound_fail:
	ldi	loop_count,3
	ldi	tmp,high(632)	; timer counert 1 ctc mode top 632(speaker output only) 
	out	OCR1AH,tmp
	ldi	tmp,low(632)
	out	OCR1AL,tmp
	rcall	sound_ready
	ldi	tmp,100
	rcall	wait_ms
	rcall	sound_out
	ldi	tmp,30
	rcall	wait_ms
	dec	loop_count
	brne	PC-11
	ret

sound_increase:
	ldi	tmp,high(3821)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(3821)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	rcall	sound_ready
	ldi	tmp,30
	rcall	wait_ms
	ldi	tmp,high(3033)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(3033)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	ldi	tmp,30
	rcall	wait_ms
	rcall	sound_out
	ret

sound_decrease:
	ldi	tmp,high(3033)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(3033)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	rcall	sound_ready
	ldi	tmp,30
	rcall	wait_ms
	ldi	tmp,high(3821)	; timer counert 1 ctc mode top 632(speaker output only) 
	ldi	tmp2,low(3821)
	out	OCR1AH,tmp
	out	OCR1AL,tmp2
	ldi	tmp,30
	rcall	wait_ms
	rcall	sound_out
	ret

sound_ready:
	ldiw	x,3500
	sts	ms_count+0,xL
	sts	ms_count+1,xH

	cpi	key_count,255
	breq	PC+8
	cpi	key_count,7
	breq	PC+6
	cpi	key_count,0
	breq	PC+4
	pop	tmp
	pop	tmp
	ret
;	ldi	tmp,high(99)	; timer counert 1 ctc mode top 632(speaker output only) 
;	ldi	tmp2,low(99)
;	out	OCR1BH,tmp
;	out	OCR1BL,tmp2
	outi	TIMSK,(1<<TOIE0)|(0<<TOIE1)|(0<<TICIE1)
	outi	TCCR1B,(1<<WGM12)|(1<<CS11)
	outi	TCCR1A,(1<<COM1A0);|(1<<COM1B0)
	sbi	PORTD,speaker
	ret

sound_out:
	cbi	PORTD,speaker
	out	OCR1AH,zero
	out	OCR1AL,zero
	outi	TIMSK,timer1_interrupt_normal_mode	; timer/count 0 overflow interrupt enable, Timer Capture interrupt enable
	outi	TCCR1A,timer1_control1_normal_mode
	outi	TCCR1B,timer1_control2_normal_mode	; 16MHz/256
;	ldi	remote_data,0xff	; ¼ýÀÚ Å° ÀԷ ó¸® À§ÇØ »èÁ¦ 2010/11/07
	ret


big_yellow_string_lower:
	rcall	big_green_string_lower
big_red_string_lower:
	pusw	x
	ldiw	x,ram_data_red_lower
	rcall	big_eraser
	rjmp	PC+3
big_green_string_lower:
	pusw	x
	ldiw	x,ram_data_green_lower
	rcall	big_eraser
	popw	x
	ret

big_yellow_string_upper:
	rcall	big_green_string_upper
big_red_string_upper:
	pusw	x
	ldiw	x,ram_data_red_upper
	rcall	big_eraser
	rjmp	PC+3
big_green_string_upper:
	pusw	x
	ldiw	x,ram_data_green_upper
	rcall	big_eraser
	popw	x
	ret

big_eraser:
	push	tmp
	push	loop_count
	pusw	x
	pusw	z
	ldi	loop_count,8
	ldi	tmp,0x0a	; blank
	rcall	put_alpha
	adiw	x,1
	dec	loop_count
	brne	PC-4
	popw	z
	popw	x
	pop	loop_count
	pop	tmp
	ret

put_alpha:
	push	tmp
	push	tmp2
	push	loop_count
	pusw	x
	pusw	z
	movw	z,x
	ldiw	x,rom_set_font
	mov	loop_count,tmp
	call	eep_read
	movw	x,z
	ldiw	z,font_8x16*2
	tst	tmp
	breq	PC+7
	lsl	tmp
	lsl	tmp
	lsl	tmp
	adiw	z,34
	dec	tmp
	brne	PC-2
	
	ldi	tmp2,16
	mul	loop_count,tmp2
	add	zL,r0
	adc	zH,r1
	ldi	loop_count,16
	lpm	tmp,z+
	st	x,tmp
	adiw	x,8
	dec	loop_count
	brne	PC-4
	popw	z
	popw	x
	pop	loop_count
	pop	tmp2
	pop	tmp
	ret

clear_all:
	rcall	big_yellow_string_lower
	rcall	clear_1line_yellow
	rjmp	clear_2line_yellow
clear_1line_yellow:
	rcall	clear_1line_red
	rjmp	clear_1line_green
clear_2line_yellow:
	rcall	clear_2line_red
	rjmp	clear_2line_green
clear_2line_red:
	push	loop_count
	pusw	x
	ldiw	x,ram_data_red+64
	rjmp	PC+18
clear_2line_green:
	push	loop_count
	pusw	x
	ldiw	x,ram_data_green+64
	rjmp	PC+12
clear_1line_red:
	push	loop_count
	pusw	x
	ldiw	x,ram_data_red
	rjmp	PC+6
clear_1line_green:
	push	loop_count
	pusw	x
	ldiw	x,ram_data_green
	ldi	loop_count,64
	ldi	tmp2,0xff
	st	x+,tmp2
	dec	loop_count
	brne	PC-3
	popw	x
	pop	loop_count
	ret


eff_fade_out:
	rcall	check_brightness
	ldi	tmp,2
	rcall	wait_ms
	dec	zL
	out	OCR0,zL
	tst	zL
	brne	PC-5
	ldi	remote_data,0xff
	touch_reset
	ret

eff_fade_in:
	rcall	check_brightness
	ldi	tmp,2
	rcall	wait_ms
	inc	tmp2
	out	OCR0,tmp2
	cp	tmp2,zL
	brne	PC-5
	ldi	remote_data,0xff
	touch_reset
	ret

eff_curtain_off:
	pusw	x
	pusw	y
	ldiw	x,ram_data_green
	ldiw	y,ram_data_red+128
	ldi	tmp2,0xff
	ldi	loop_count,18
	ldi	tmp,15
	rcall	wait_ms
	push	loop_count
	ldi	loop_count,8
	st	x+,tmp2
	st	-y,tmp2
	dec	loop_count
	brne	PC-3
	pop	loop_count
	dec	loop_count
	brne	PC-10
	popw	y
	popw	x
	ldi	remote_data,0xff
	touch_reset
	ret



; effect - all display scroll left & pull down right hidden
eff_change_scroll_left_line2:
	push	tmp4
	ldi	tmp4,0x02
	rjmp	eff_change_scroll_left_all+2
eff_change_scroll_left_line1:
	push	tmp4
	ldi	tmp4,0x01
	rjmp	PC+3
eff_change_scroll_left_all:
	push	tmp4
	ldi	tmp4,0x00

	push	tmp

	push	loop_count
	pusw	y
	pusw	z
	ldi	loop_count,16*4
	bst	loop_count,0
	push	loop_count
	ldi	loop_count,1
	ldi	tmp,0x01
	cp	line_select,tmp
	brne	PC-1
	cpi	tmp4,0
	brne	PC+2
	brtc	PC+3
	ldi	tmp,1
	rcall	wait_ms
	dec	loop_count
	brne	PC-6
	cpi	tmp4,0x00
	brne	PC+6
	ldiw	y,ram_data_green_lower+120
	ldiw	z,ram_data_red_lower+120
	rjmp	PC+14
	cpi	tmp4,0x01
	brne	PC+6
	ldiw	y,ram_data_green_lower+64
	ldiw	z,ram_data_red_lower+64
	rjmp	PC+7
	cpi	tmp4,0x02
	brne	PC+6
	ldiw	y,ram_data_green_lower+128+8
	ldiw	z,ram_data_red_lower+128+8
	cpi	tmp4,0x00
	brne	PC+3
	ldi	loop_count,16
	rjmp	PC+2
	ldi	loop_count,8
	push	loop_count
	pusw	y
	pusw	z
	sec
	ldi	loop_count,2
	push	loop_count
	ldi	loop_count,8
	ld	tmp,-y
	rol	tmp
	st	y,tmp
	dec	loop_count
	brne	PC-4
	in	tmp,SREG
	sbiw	y,48
	sbiw	y,48
	sbiw	y,24
	out	SREG,tmp
	pop	loop_count
	dec	loop_count
	brne	PC-14
	ldi	loop_count,2
	push	loop_count
	ldi	loop_count,8
	ld	tmp,-z
	rol	tmp
	st	z,tmp
	dec	loop_count
	brne	PC-4
	in	tmp,SREG
	sbiw	z,48
	sbiw	z,48
	sbiw	z,24
	out	SREG,tmp
	pop	loop_count
	dec	loop_count
	brne	PC-14
	popw	z
	popw	y
	pop	loop_count
	sbiw	y,8
	sbiw	z,8
	dec	loop_count
	brne	PC-46
	pop	loop_count
	dec	loop_count
	breq	PC+2
	rjmp	PC-88
	popw	z
	popw	y
	pop	loop_count
	pop	tmp
	pop	tmp4
	ldi	remote_data,0xff
	ret




eff_change_linefeed_down:
	push	tmp
	push	tmp2
	push	tmp3
	push	loop_count
	pusw	y
	pusw	z

	ldiw	y,ram_data_green_upper
	ldiw	z,ram_data_red_upper

	ldi	loop_count,16

	push	loop_count
	pusw	y
	pusw	z
;

	ldi	loop_count,8	; 

;	pusw	y
;	pusw	z
	movw	r24:r25,y
	movw	x,z

	ld	tmp,y
	ld	tmp2,z

	subi	yL,128
	sbci	yH,255
	subi	zL,128
	sbci	zH,255

	st	y,tmp
	st	z,tmp2
;	popw	z
;	popw	y
	movw	z,x
	movw	y,r24:r25

	adiw	y,1
	adiw	z,1
	dec	loop_count	; loop_count
	brne	PC-15
;
;	ldi	tmp,18
;	rcall	wait_ms
	ldiw	x,rom_set_effect_speed
	rcall	eep_read
	mov	loop_count,tmp
	ldi	tmp,0x01
	cp	line_select,tmp
	brne	PC-1
	ldi	tmp,1
	rcall	wait_ms
	dec	loop_count
	brne	PC-6

	popw	z
	popw	y
	pop	loop_count

	adiw	y,8
	adiw	z,8

	dec	loop_count
	brne	PC-41


	popw	z
	popw	y
	pop	loop_count
	pop	tmp3
	pop	tmp2
	pop	tmp
	ret


; effect - all display scroll down & pull down upper hidden
eff_change_scroll_down:
	push	tmp
	push	tmp2
	push	tmp3
	push	loop_count
	pusw	y
	pusw	z
	ldi	tmp3,0xff
	ldiw	y,ram_data_green+120
	ldiw	z,ram_data_red+120
	ldi	loop_count,16
	push	loop_count
	pusw	y
	pusw	z


	ldiw	x,rom_set_effect_speed
	rcall	eep_read
	mov	loop_count,tmp
	ldi	tmp,0x01
	cp	line_select,tmp
	brne	PC-1
	ldi	tmp,1
	rcall	wait_ms
	dec	loop_count
	brne	PC-6



;	ldi	tmp,12
;	rcall	wait_ms
	ldi	loop_count,32
;	push	loop_count
;	pusw	y
;	pusw	z
	movw	r24:r25,y
	movw	x,z
	ldi	r23,8
	ld	tmp,y
	ld	tmp2,z
	st	y,tmp3
	st	z,tmp3
	std	y+8,tmp
	std	z+8,tmp2
	adiw	y,1
	adiw	z,1
	dec	r23
	brne	PC-9
;	popw	z
;	popw	y
	movw	z,x
	movw	y,r24:r25
	sbiw	y,8
	sbiw	z,8
;	pop	loop_count
	dec	loop_count
	brne	PC-18
	popw	z
	popw	y
	adiw	y,8
	adiw	z,8
	pop	loop_count
	dec	loop_count
	brne	PC-44
	popw	z
	popw	y
	pop	loop_count
	pop	tmp3
	pop	tmp2
	pop	tmp
	ldi	remote_data,0xff
	ret



eff_change_snow_down:

	push	key_count
	ldiw	y,ram_data_green_upper+128
	ldiw	z,ram_data_red_upper+128
	ldi	tmp4,0xff


	ldi	loop_count,16
eff_change_snow_down_posa:
	sbiw	y,8
	sbiw	z,8

	mov	key_count,loop_count
	push	loop_count
	pusw	y
	pusw	z

	ldi	loop_count,2

eff_change_snow_down_posb:
	ldi	tmp3,0xaa
	sbrs	loop_count,0
	com	tmp3	; 0x55
;-
	push	loop_count

	pusw	y
	pusw	z

	ldi	loop_count,8
	ld	tmp,y+
	ld	tmp2,z+
	or	tmp,tmp3
	or	tmp2,tmp3
	std	y+7,tmp
	std	z+7,tmp2
	dec	loop_count
	brne	PC-7
;;;;

	pusw	y
	pusw	z
	ldi	loop_count,15
	cp	loop_count,key_count
	brcc	PC+3
	ldi	tmp,7
	rcall	wait_ms

	push	loop_count
	ldi	loop_count,8
	ld	tmp,y
	ld	tmp2,z
	st	y+,tmp4
	st	z+,tmp4
	std	y+7,tmp
	std	z+7,tmp2
	dec	loop_count
	brne	PC-7

	pop	loop_count
	dec	loop_count
	brne	PC-16

	popw	z
	popw	y

	cpi	tmp3,0x55
	breq	PC+19
	ldi	loop_count,8
	ld	tmp,-y
	ld	tmp2,-z
	push	tmp
	push	tmp2
	dec	loop_count
	brne	PC-5
	subi	yL,128
	sbci	yH,255
	subi	zL,128
	sbci	zH,255
	ldi	loop_count,8
	pop	tmp
	pop	tmp2
	st	z+,tmp
	st	y+,tmp2
	dec	loop_count
	brne	PC-5

;;--
	popw	z
	popw	y
	pop	loop_count
	dec	loop_count
	breq	PC+2
	rjmp	eff_change_snow_down_posb



	popw	z
	popw	y
	pop	loop_count

	dec	loop_count
	breq	PC+11
	pusw	y
	pusw	z
	rcall	check_alarm
	popw	z
	popw	y
	rjmp	eff_change_snow_down_posa
	pop	key_count
	ret


eff_change_linefeed_up:
	push	tmp
	push	tmp2
	push	tmp3
	push	loop_count
	pusw	y
	pusw	z

	ldiw	y,ram_data_green_lower+120
	ldiw	z,ram_data_red_lower+120

	ldi	loop_count,16

	push	loop_count
	pusw	y
	pusw	z
;

	ldi	loop_count,8

;	pusw	y
;	pusw	z
	movw	r24:r25,y
	movw	x,z

	ld	tmp,y
	ld	tmp2,z

	subi	yL,128
	sbci	yH,0
	subi	zL,128
	sbci	zH,0

	st	y,tmp
	st	z,tmp2
;	popw	z
;	popw	y
	movw	z,x
	movw	y,r24:r25

	adiw	y,1
	adiw	z,1
	dec	loop_count
	brne	PC-15
;
;	ldi	tmp,18
;	rcall	wait_ms

	ldiw	x,rom_set_effect_speed
	rcall	eep_read
	mov	loop_count,tmp
	ldi	tmp,0x01
	cp	line_select,tmp
	brne	PC-1
	ldi	tmp,1
	rcall	wait_ms
	dec	loop_count
	brne	PC-6

	popw	z
	popw	y
	pop	loop_count

	subi	yL,8
	sbci	yH,0
	subi	zL,8
	sbci	zH,0

	dec	loop_count
	brne	PC-43


	popw	z
	popw	y
	pop	loop_count
	pop	tmp3
	pop	tmp2
	pop	tmp
	ret


; effect - all display scroll down & pull up lower hidden
eff_change_scroll_up:
	push	tmp
	push	tmp2
	push	tmp3
	push	loop_count
	pusw	y
	pusw	z
	ldi	tmp3,0xff
	ldiw	y,ram_data_green_upper+128
	ldiw	z,ram_data_red_upper+128
	ldi	loop_count,16
	push	loop_count
	pusw	y
	pusw	z


	ldiw	x,rom_set_effect_speed
	rcall	eep_read
	mov	loop_count,tmp
	ldi	tmp,0x01
	cp	line_select,tmp
	brne	PC-1
	ldi	tmp,1
	rcall	wait_ms
	dec	loop_count
	brne	PC-6


;	ldi	tmp,12
;	rcall	wait_ms


	ldi	loop_count,32
	push	loop_count
	pusw	y
	pusw	z
	ldi	loop_count,8
;	pusw	y
;	pusw	z
	movw	r24:r25,y
	movw	x,z
	ld	tmp,y
	ld	tmp2,z
	st	y,tmp3
	st	z,tmp3
	sbiw	y,8
	sbiw	z,8
	st	y,tmp
	st	z,tmp2
;	popw	z
;	popw	y
	movw	y,r24:r25
	movw	z,x
	adiw	y,1
	adiw	z,1
	dec	loop_count
	brne	PC-15
	popw	z
	popw	y
	adiw	y,8
	adiw	z,8
	pop	loop_count
	dec	loop_count
	brne	PC-30
	popw	z
	popw	y
	sbiw	y,8
	sbiw	z,8
	pop	loop_count
	dec	loop_count
	brne	PC-56
	popw	z
	popw	y
	pop	loop_count
	pop	tmp3
	pop	tmp2
	pop	tmp
	ldi	remote_data,0xff
	ret


eff_change_fade_inout:
	ldi	tmp,30
	rcall	wait_us
	rcall	check_brightness
	tst	adc_count
	brne	PC-4
	mov	zH,zL
	ldi	tmp,1
	rcall	wait_ms
	dec	zL
	out	OCR0,zL
	tst	zL
	brne	PC-5

	call	load_hidden_buff

	ldi	tmp,1
	rcall	wait_ms
	inc	zL
	out	OCR0,zL
	cp	zL,zH
	brne	PC-5
	ldi	remote_data,0xff

	touch_reset
	ret


string_small_type2:
;	push	tmp
;	in	tmp,UCSRB
	push	tmp
;	cbi	UCSRB,RXCIE
	push	tmp3
	ldi	tmp3,0
	adiw	x,1
	rjmp	string_small_common

string_small:
;	push	tmp
;	in	tmp,UCSRB
	push	tmp
;	cbi	UCSRB,RXCIE
	push	tmp3
	ldi	tmp3,2
string_small_common:
	push	loop_count
	pusw	x
	pusw	z
	ldi	loop_count,10
	lpm	tmp,z+
	rcall	put_small
	cpi	tmp3,6
	brne	PC+3
	clr	tmp3
	rjmp	PC+5
	inc	tmp3
	inc	tmp3
	cpi	tmp3,2
	breq	PC+2
	adiw	x,1
	dec	loop_count
	brne	PC-12
	popw	z
	popw	x
	pop	loop_count
	pop	tmp3
	pop	tmp
;	out	UCSRB,tmp
;	pop	tmp
	ret

put_small:
	push	tmp
	push	tmp2
	push	tmp3
	push	loop_count
	pusw	x
	pusw	y
	pusw	z
	sbiw	x,1
	movw	y,x
	adiw	y,1
	inc	tmp3
	ldiw	z,(font_5x8-(4*32))*2
	ldi	tmp2,8
	mul	tmp,tmp2
	add	zL,r0
	adc	zH,r1
	ldi	loop_count,8
	lpm	tmp,z
	ldi	tmp2,10
	push	tmp3
	dec	tmp3
	breq	PC+4
	sec
	rol	tmp
	rjmp	PC-4
	pop	tmp3
	lpm	tmp,z
	push	tmp3
	dec	tmp3
	breq	PC+4
	sec
	rol	tmp
	rjmp	PC-4
	pop	tmp3
	push	tmp
	lpm	tmp,z+
	cpi	tmp3,0x01
	breq	PC+9
	push	tmp3
	sub	tmp2,tmp3
	dec	tmp2
	breq	PC+4
	sec
	ror	tmp
	rjmp	PC-4
	pop	tmp3
	ld	tmp2,x
	and	tmp,tmp2
	st	x,tmp
	pop	tmp
	cpi	tmp3,0x01
	breq	PC+5
	ld	tmp2,y
	and	tmp,tmp2
	st	y,tmp
	adiw	y,8
	adiw	x,8
	dec	loop_count
	brne	PC-41
	popw	z
	popw	y
	popw	x
	pop	loop_count
	pop	tmp3
	pop	tmp2
	pop	tmp
	ret

; ¸ð´×ÄÝ(¾Ë¶÷) äũ
; alarm check
check_alarm:
	rcall	check_brightness

	tst	quick_memo_flag
	breq	PC+2
	rjmp	quick_memo

	push	tmp
	push	tmp2
	push	loop_count

	ldi	tmp,0	; rtc second
	rcall	rtc_read
	cpi tmp,0
	breq	PC+2
	rjmp	check_alarm_out	; second != 0, return

	ldi	tmp,1	; rtc minute
	rcall	rtc_read
	cpi	tmp,0
	brne	PC+29

	; 2011/02/15 Á¤°¢¾Ë¸²À½ ºÎºÐ º¯°æ
	ldiw	x,rom_chime_mode
	rcall	eep_read
	cpi	tmp,0
	breq	PC+24	; beep always off
	cpi	tmp,1
	breq	PC+10	; beep always on
	sbi	ADCSRA,ADSC	; enable convert
	sbis	ADCSRA,ADIF	; convert complete
	rjmp	PC-1
	in	tmp,ADCL	; read ADCL:ADCH
	in	tmp2,ADCH
	cpi	tmp,0
	brne	PC+3	; beep day on
	cpi	tmp2,0
	breq	PC+13	; beep night off
	ldiw	x,rom_chime_type
	ldiw	z,check_alarm_chime_type_routine*2
	rcall	eep_read
	lsl	tmp
	add	zL,tmp
	adc	zH,zero
	lpm	tmp,z+
	lpm	tmp2,z
	movw	z,tmp:tmp2
	icall

	ldiw	x,rom_alarm_minute
	rcall	eep_read
	mov	tmp2,tmp
	ldi	tmp,1	; rtc minute
	rcall	rtc_read
	cp	tmp,tmp2
	brne	check_alarm_out	; minute no match, go return

	ldiw	x,rom_alarm_hour
	rcall	eep_read
	mov	tmp2,tmp
	ldi	tmp,2	; rtc hour
	rcall	rtc_read
	cp	tmp,tmp2
	brne	check_alarm_out	; hour no match, go return

; do alarm mode check
	ldiw	x,rom_alarm_mode
	rcall	eep_read

	cpi	tmp,0;	.db "ALARM OFF "
	breq	check_alarm_out	; alarm off, go return
	cpi	tmp,1;	.db "   ONCE   "
	brne	PC+4

	ldi	tmp,0	; alarm off
	rcall	eep_write
	rjmp	wake_up
	cpi	tmp,2;	.db " EVERYDAY "
	breq	wake_up	; go alarm beep always
; alarm mode check pause

	lds	tmp2,week_day
	cpi	tmp2,0	; sunday
	breq	PC+6	; weekend
	cpi	tmp2,6	; saturday
	breq	PC+4	; weekend
;;; alarm mode check continue(weekday)
	cpi	tmp,3;	.db "  WEEKDAY "
	brne	check_alarm_out	; no match, return
	rjmp	wake_up
;;; alarm mode check continue(weekend)
	cpi	tmp,4;	.db "  WEEKEND "
	brne	check_alarm_out	; no match, return
	rjmp	wake_up

check_alarm_out:
	ldi	tmp,12
	rcall	wait_ms

	pop	loop_count
	pop	tmp2
	pop	tmp
	ret


wake_up:
wake_up_loop:
	call	gmt_processor

; 2010/04/18
; ¾Ë¶÷ 1ºÐ Áö¼Ó½Ã Á¾·áÇϵµ·Ï Ãß°¡, ÀÌÇÏ 5°³ ¸í·É
; Alarm stops after 1 minute(Below 5 order)
	ldi	loop_count,1	; 1À» ÁÖ´Â ÀÌÀ¯´Â ¾Ë¶÷ È­¸éÀÌ À¯ÁöµÈ »óÅ¿¡¼­ ¸ØÃß´Â °æ¿ì°¡ À־ ¹Ù·Î ´ÙÀ½ ¸ðµå·Î À̵¿ÇÏ°Ô Çϱâ À§ÇÔ
	ldiw	x,rom_alarm_minute
	rcall	eep_read
	mov	tmp2,tmp
	ldi	tmp,1	; minute
	rcall	rtc_read
	cp	tmp,tmp2
	brne	check_alarm_out	; ¾Ë¶÷ÀÌ 1ºÐ ¿ï¸®¸é Á¾·á(¹Ýȯ°©/return : loop_count = 1)

	mov	loop_count,tmp4
	ldi	tmp,0	; rtc second
	rcall	rtc_read
	mov	tmp4,tmp	; old second
	cp	loop_count,tmp4
	breq	PC+35
	call	clear_all	; new second, update display
	ldiw	y,ram_data_green
	ldiw	z,ram_data_red
	call	display_clock_common1
	ldiw	x,ram_data_green+64+6
	call	display_clock_common2
	ldiw	z,ram_data_green
	call	display_clock_common3

	ldi	tmp,0	; rtc second
	rcall	rtc_read
	andi	tmp,0x01
	breq	PC+14

	ldi	loop_count,8*16
	ldiw	x,ram_data_green
	ldiw	y,ram_data_red
	ld	tmp,x
	ld	tmp2,y
	com	tmp
	com	tmp2
	st	x+,tmp
	st	y+,tmp2
	dec	loop_count
	brne	PC-7
	rcall	sound_alarm

	ldi	tmp,7
	rcall	wait_ms

	rcall	key_check
	cpi	tmp,key_no
	breq	wake_up_loop
	rjmp	check_alarm_out	; Press any key to stop alarm



check_brightness:
	ldiw	x,rom_brightness_mode
	call	eep_read
	andi	tmp,0x02
	brne	PC+4
	ldiw	x,rom_brightness_set_manual
	rjmp	PC+9

	rcall	check_cds

	cpi	tmp,1
	brcc	PC+4
	ldiw	x,rom_brightness_set_day
	rjmp	PC+3
	ldiw	x,rom_brightness_set_night

	call	eep_read
	rcall	set_process_disp_common_display_bright_check

	ret

/*
; output = tmp:tmp2
check_cds:
	push	tmp4
	push	loop_count
	clr	tmp
	clr	tmp2
	ldi	loop_count,16
	ldi	tmp,30
	rcall	wait_us
	sbi	ADCSRA,ADSC	; enable convert
	sbis	ADCSRA,ADIF	; convert complete
	rjmp	PC-1
	in	tmp3,ADCL	; read ADCL:ADCH
	in	tmp4,ADCH
	cbi	ADCSRA,ADSC
	add	tmp,tmp3
	adc	tmp2,tmp4
	dec	loop_count
	brne	PC-11
;adc_count
	ldi	tmp4,6
	lsr	tmp2	; / 6
	ror	tmp
	dec	tmp4
	brne	PC-3

	pop	loop_count
	pop	tmp4
	ret

*/

check_cds:
	push	tmp4
	push	loop_count

	sbi	ADCSRA,ADSC	; enable convert
	sbis	ADCSRA,ADIF	; convert complete
	rjmp	PC-1
	in	tmp3,ADCL	; read ADCL:ADCH
	in	tmp4,ADCH
	cbi	ADCSRA,ADSC

	lds	tmp,adc_buff+adc_buff_low
	lds	tmp2,adc_buff+adc_buff_high
	lds	r25,adc_buff+adc_buff_byte3
	add	tmp,tmp3
	adc	tmp2,tmp4
	adc	r25,zero
	sts	adc_buff+adc_buff_low,tmp
	sts	adc_buff+adc_buff_high,tmp2
	sts	adc_buff+adc_buff_byte3,r25

	dec	adc_count
	brne	check_cds_out
	ldi	tmp,0	; 256
	mov	adc_count,tmp

	lds	tmp,adc_buff+adc_buff_low
	lds	tmp2,adc_buff+adc_buff_high
	lds	r25,adc_buff+adc_buff_byte3
	sts	adc_buff+adc_buff_low,zero
	sts	adc_buff+adc_buff_high,zero
	sts	adc_buff+adc_buff_byte3,zero

	ldi	tmp4,10
	lsr	tmp2	; / 10
	ror	tmp
	dec	tmp4
	brne	PC-3

	pop	loop_count
	pop	tmp4
	ret

check_cds_out:
	pop	loop_count
	pop	tmp4
	pop	tmp
	pop	tmp
	ret


; Äü ¸Þ¸ð ±â´É
; quick memo
quick_memo:
; 2010/04/23
; rtc setÃß°¡, Sleep mode¿¡¼­ ¹Ù·Î ÁøÀÔÇϸé DisableµÈ »óŸ¦ À¯ÁöÇϱ⠶§¹®ÀÓ
	ldi	tmp,0x07
	ldi	tmp2,0x90	; SQW Enable, 1Hz
	call	rtc_write

	cli
	ldiw	x,RAMEND
	out	SPH,xH
	out	SPL,xL
	sei
	rcall	eff_fade_out

	rcall	clear_all

	ldiw	z,set_msg_upper_quickmemo*2
	ldiw	x,ram_data_green
	call	string_small
	adiw	z,21
	ldiw	x,ram_data_red
	call	string_small

	ldiw	y,menu_value
	rcall	set_load_value_quickmemo
	rcall	set_process_quickmemo_common_display

	rcall	eff_fade_in
	ldi	tmp,6	; Äü ¸Þ¸ð À§Ä¡
	mov	menu_select,tmp
	clr	menu_position
	
;	cbi	UCSRB,RXCIE
	jmp	menu_sub_entry	; Äü¸Þ´ºµµ ÅëÇÕ


delay_alert_view:
	ldi	tmp2,4
	ldi	tmp,250
	rcall	wait_ms
	dec	tmp2
	brne	PC-3
	ret

; Wait for 14.7456MHz X-TAL(input = tmp(ms))
; But, the interrupt will be delayed by about 2 times because of the time.
wait_ms:
	push	tmp
	ldi	tmp,4
	push	tmp
	ldi	tmp,249
	rcall	wait_us
	pop	tmp
	dec	tmp
	brne	PC-5
	pop	tmp
	dec	tmp
	brne	wait_ms
	ret

wait_us:
	wdr	; watch dog timer reset
	push	r0
	pop	r0
	push	r0
	pop	r0
	push	r0
	pop	r0
	dec	tmp
	brne	wait_us
	ret

draw_circle:
	ldiw	z,circle*2
	ldi	tmp2,128
	lpm	tmp,z+
	st	y+,tmp
	dec	tmp2
	brne	PC-3
	ret
/*
play_game_tetris:
;	jmp	reset
	rcall	clear_all

	ldiw	y,ram_data_red+1
	ldi	loop_count,16
	ldi	tmp,0xfe
	ldi	tmp2,0x7f
	st	y,tmp
	std	y+3,tmp2
	adiw	y,8
	dec	loop_count
	brne	PC-6



	ldiw	x,ram_data_green+64+13
;	lds	tmp,ram_time_minute
	ldI	tmp,0
	swap	tmp
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,1
	sbiw	x,1
	ldi	tmp4,8
	rcall	put_small_blink

;	lds	tmp,ram_time_minute
	ldI	tmp,0
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,3
	rcall	put_small_blink

	ldi	tmp3,6
	ldi	tmp,':'
	ldi	tmp4,255
	rcall	put_small_blink

;	lds	tmp,ram_time_second
	ldI	tmp,0
	swap	tmp
	andi	tmp,0x07
	ori	tmp,0x30
	ldi	tmp3,2
	ldi	tmp4,10
	sbiw	x,1
	rcall	put_small_blink
;	lds	tmp,ram_time_second
	ldI	tmp,0
	andi	tmp,0x0f
	ori	tmp,0x30
	ldi	tmp3,4
	ldi	tmp4,10
	rcall	put_small_blink




;------------------------------------------------
;	16-Bit / 8-Bit = 8-Bit Unsigned Division
;	(tmp4:tmp3 / tmp --> Q = tmp3, R = tmp4)
;------------------------------------------------
	ldiw	y,game_buff
; »õ·Î¿î ºí·Ï Á¾·ù ¼±ÅÃ
	mov	tmp3,line_select
	clr	tmp4
	ldi	tmp,7
	call	DIV8_a

	ldd	tmp,y+game_tetris_next_block
	std	y+game_tetris_this_block,tmp
	std	y+game_tetris_next_block,tmp4

; »õ·Î¿î ºí·ÏÀÇ È¸Àü°ª ¼±ÅÃ
	mov	tmp3,line_select
	clr	tmp4
	ldi	tmp,3
	call	DIV8_a
	std	y+game_tetris_block_rotate,tmp4


	ldd	tmp,y+game_tetris_this_block
	lsl	tmp
	lsl	tmp
	lsl	tmp
;	ldd	tmp4,y+game_tetris_block_rotate
	lsl	tmp4
	add	tmp,tmp4
	ldiw	z,tetris_pattern*2
	add	zL,tmp
	adc	zH,zero

; »õ·Î¿î ºí·Ï »ý¼º
	ldiw	x,ram_game_tetris_block_buff+2
	ldi	loop_count,2
	lpm	tmp,z+
	mov	tmp2,tmp
	swap	tmp2
	ori	tmp,0xf0
	ori	tmp2,0xf0
	ldi	tmp3,0xff
	ldi	tmp4,0xff
	ldi	r25,3
	sec
	ror	tmp
	ror	tmp3
	sec
	ror	tmp2
	ror	tmp4
	dec	r25
	brne	PC-7

	st	x+,tmp
	st	x+,tmp3
	adiw	x,6
	st	x+,tmp2
	st	x+,tmp4
	adiw	x,6
	dec	loop_count
	brne	PC-23



play_game_tetris_loop:
	ldi	tmp,250
	rcall	wait_ms
	rjmp	play_game_tetris


; IR¸®¸ðÄÁ ó¸®
	cpi	remote_data,ir_ent
	brne	PC+3
	ldi	key_count,255
	rjmp	play_game_tetris_loop_pause
	cpi	remote_data,ir_esc
	breq	play_game_tetris_loop_block_escape
	cpi	remote_data,ir_right
	breq	play_game_tetris_loop_block_right
	cpi	remote_data,ir_inc
	breq	play_game_tetris_loop_block_change
	cpi	remote_data,ir_dec
	breq	play_game_tetris_loop_block_drop
	cpi	remote_data,ir_left
	breq	play_game_tetris_loop_block_left

	ldiw	x,ram_data_green+2

	call	key_check_key_only
	cpi	tmp,key_ent
	brne	play_game_tetris_loop_block_left-2
play_game_tetris_loop_pause:


	cpi	tmp,key_dec
	brne	play_game_tetris_loop_block_right-2
play_game_tetris_loop_block_left:
call	sound_pass
	ldiw	x,ram_data_green+2

	ld	tmp,x+
	ld	tmp2,x+
	sec
	rol	tmp
	rol	tmp2
	brcc		play_game_tetris_loop_reready
	adiw	x,6
	cpi	xL,low(ram_data_green+130)
	ldi	tmp,high(ram_data_green+130)
	cpc	xH,tmp
	brne	PC-10

	ld	tmp,-x
	ld	tmp2,-x
	sec
	rol	tmp
	rol	tmp2
	st	x+,tmp
	st	x+,tmp2
	sbiw	x,8
	cpi	xL,low(ram_data_green+2-8)
	ldi	tmp,high(ram_data_green+2-8)
	cpc	xH,tmp
	brne	PC-11
	rjmp	play_game_tetris_loop_reready

	cpi	tmp,key_inc
	brne	play_game_tetris_loop_block_drop-2
play_game_tetris_loop_block_right:
	sec
	ld	tmp,-x
	ror	tmp
	brcc		play_game_tetris_loop_reready
	st	x,tmp
	sbrs	xL,0
	sbiw	x,6
	cpi	xL,low(ram_data_green+2)
	brne	PC-8

	cpi	tmp,key_game_drop
	brne	play_game_tetris_loop_block_change-2
play_game_tetris_loop_block_drop:

	cpi	tmp,key_game_change
	brne	play_game_tetris_loop_block_escape-2
play_game_tetris_loop_block_change:

	cpi	tmp,key_esc
	brne	play_game_tetris_loop_reready
play_game_tetris_loop_block_escape:



play_game_tetris_loop_reready:
	rjmp	play_game_tetris_loop








	ldiw	z,tetris_pattern*2



; Å×Æ®¸®½º - ÇÑ ÁÙÀÌ ´Ù Â÷¸é Áö¿öÁö´Â ºÎºÐ
	ldi	loop_count,16
	ldiw	z,ram_data_green_lower-6

	ldd	tmp,z+8
	ldd	tmp2,z+9
	cpi	tmp,0x00	; ÇØ´ç ¶óÀÎ ÁÂÃøÀÌ ²Ë á´Â°¡?
	brne	PC+16
	cpi	tmp2,0x00	; ÇØ´ç ¶óÀÎ ¿ìÃøÀÌ ²Ë á´Â°¡?
	brne	PC+14

	cpi	loop_count,16	; ¸¸¾à ù¹ø° ¶óÀÎÀ̶ó¸é ºí·Ï »èÁ¦¸¸ ÇÔ.
	ldi	tmp3,0xff	; ºí·Ï Ŭ¸®¾î°ª ·Îµå
	ldi	tmp4,0xff
	breq	PC+3
	ldd	tmp,z+0	; ù¹ø° ¶óÀÎÀÌ ¾Æ´Ï¶ó¸é ºí·ÏÀ» »èÁ¦ÇÏ°í ±× À§ÀÇ ºí·ÏÀ» ²ø¾î³»¸².
	ldd	tmp2,z+1
	brne	PC+2
	movw	tmp:tmp2,tmp3:tmp4
	std	z+8,tmp
	std	z+9,tmp2
	breq	PC+3
	std	z+0,tmp3	; ù¹ø° ¶óÀÎÀÌ ¾Æ´Ï¶ó¸é ºí·ÏÀ» »èÁ¦ÇÏ°í ±× À§ÀÇ ºí·ÏÀ» ²ø¾î³»¸².
	std	z+1,tmp4

	adiw	z,8
	dec	loop_count
	brne	PC-21	; 16¶óÀÎÀ» ´Ù °Ë»çÇÏÁö ¾Ê¾ÒÀ» °æ¿ì ±× ´ÙÀ½¶óÀÎÀ» °Ë»çÇÔ.







play_game_snake:

*/

set_msg_upper_addr_list:
	.dw	set_msg_upper_clock*2
	.dw	set_msg_upper_alarm*2
	.dw	set_msg_upper_dday*2
	.dw	set_msg_upper_display*2
	.dw	set_msg_upper_remote*2
	.dw	set_msg_upper_game*2
	.dw	set_msg_upper_quickmemo*2

set_load_value_list:
	.dw	set_load_value_clock
	.dw	set_load_value_alarm
	.dw	set_load_value_dday
	.dw	set_load_value_display
	.dw	set_load_value_remote
	.dw	set_load_value_game
	.dw	set_load_value_quickmemo
	
set_store_value_list:
	.dw	set_store_value_clock
	.dw	set_store_value_alarm
	.dw	set_store_value_dday
	.dw	set_store_value_display
	.dw	set_store_value_remote
	.dw	set_store_value_game
	.dw	set_store_value_quickmemo

set_ref_value_end_pos_list:
	.db	10,6,15,13,0,1,9,0
;	.db	10,4,15,13,0,9

set_process_addr_list:
	.dw	set_process_addr_clock*2
	.dw	set_process_addr_alarm*2
	.dw	set_process_addr_dday*2
	.dw	set_process_addr_display*2
	.dw	set_process_addr_remote*2
	.dw	set_process_addr_game*2
	.dw	set_process_addr_quickmemo*2

set_process_addr_clock:
	.dw	set_process_clock_10year_inc
	.dw	set_process_clock_10year_dec
	.dw	set_process_clock_1year_inc
	.dw	set_process_clock_1year_dec
	.dw	set_process_clock_10month_inc
	.dw	set_process_clock_10month_dec
	.dw	set_process_clock_1month_inc
	.dw	set_process_clock_1month_dec
	.dw	set_process_clock_10date_inc
	.dw	set_process_clock_10date_dec
	.dw	set_process_clock_1date_inc
	.dw	set_process_clock_1date_dec
	.dw	set_process_clock_10hour_inc
	.dw	set_process_clock_10hour_dec
	.dw	set_process_clock_1hour_inc
	.dw	set_process_clock_1hour_dec
	.dw	set_process_clock_10minute_inc
	.dw	set_process_clock_10minute_dec
	.dw	set_process_clock_1minute_inc
	.dw	set_process_clock_1minute_dec
	.dw	set_process_clock_second_inc
	.dw	set_process_clock_second_dec


set_process_addr_alarm:
	.dw	set_process_alarm_10hour_inc
	.dw	set_process_alarm_10hour_dec
	.dw	set_process_alarm_1hour_inc
	.dw	set_process_alarm_1hour_dec
	.dw	set_process_alarm_10minute_inc
	.dw	set_process_alarm_10minute_dec
	.dw	set_process_alarm_1minute_inc
	.dw	set_process_alarm_1minute_dec
	.dw	set_process_alarm_mode_inc
	.dw	set_process_alarm_mode_dec
	.dw	set_process_alarm_chime_inc
	.dw	set_process_alarm_chime_dec
	.dw	set_process_alarm_chimetype_inc
	.dw	set_process_alarm_chimetype_dec
	


set_process_addr_dday:
	.dw	set_process_dday_10year_inc
	.dw	set_process_dday_10year_dec
	.dw	set_process_dday_1year_inc
	.dw	set_process_dday_1year_dec
	.dw	set_process_dday_10month_inc
	.dw	set_process_dday_10month_dec
	.dw	set_process_dday_1month_inc
	.dw	set_process_dday_1month_dec
	.dw	set_process_dday_10date_inc
	.dw	set_process_dday_10date_dec
	.dw	set_process_dday_1date_inc
	.dw	set_process_dday_1date_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec
	.dw	set_process_dday_message_inc
	.dw	set_process_dday_message_dec



set_process_addr_display:
	.dw	set_process_display_dotact_inc
	.dw	set_process_display_dotact_dec
	.dw	set_process_display_mode_inc
	.dw	set_process_display_mode_dec
	.dw	set_process_display_1224_inc
	.dw	set_process_display_1224_dec
	.dw	set_process_display_night_inc
	.dw	set_process_display_night_dec
	.dw	set_process_display_day_inc
	.dw	set_process_display_day_dec
;	.dw	set_process_display_10cds_inc
;	.dw	set_process_display_10cds_dec
;	.dw	set_process_display_cds_inc
;	.dw	set_process_display_cds_dec
	.dw	set_process_display_manual_inc
	.dw	set_process_display_manual_dec
	.dw	set_process_display_font_inc
	.dw	set_process_display_font_dec
	.dw	set_process_display_eff_inc
	.dw	set_process_display_eff_dec
	.dw	set_process_display_effspeed_inc
	.dw	set_process_display_effspeed_dec
	.dw	set_process_display_waittime_inc
	.dw	set_process_display_waittime_dec
	.dw	set_process_display_waitdate_inc
	.dw	set_process_display_waitdate_dec
	.dw	set_process_display_waittemp_inc
	.dw	set_process_display_waittemp_dec
	.dw	set_process_display_waitdday_inc
	.dw	set_process_display_waitdday_dec
	.dw	set_process_display_waitlogo_inc
	.dw	set_process_display_waitlogo_dec


set_process_addr_remote:
	.dw	set_process_dday_mode_inc
	.dw	set_process_dday_mode_dec

set_process_addr_game:
	.dw	set_process_game_select_inc
	.dw	set_process_game_select_dec

set_process_addr_quickmemo:
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec
	.dw	set_process_quickmemo_inc
	.dw	set_process_quickmemo_dec

set_disp_value_addr_list:
	.dw	set_disp_value_clock*2
	.dw	set_disp_value_alarm*2
	.dw	set_disp_value_dday*2
	.dw	set_disp_value_display*2
	.dw	set_disp_value_remote*2
	.dw	set_disp_value_game*2
	.dw	set_disp_value_quickmemo*2

set_disp_value_clock:
	.dw	set_process_clock_common_display_date
	.dw	set_process_clock_common_display_date
	.dw	set_process_clock_common_display_date
	.dw	set_process_clock_common_display_date
	.dw	set_process_clock_common_display_date
	.dw	set_process_clock_common_display_date
	.dw	set_process_clock_common_display_clock
	.dw	set_process_clock_common_display_clock
	.dw	set_process_clock_common_display_clock
	.dw	set_process_clock_common_display_clock
	.dw	set_process_clock_common_display_clock

set_disp_value_alarm:
	.dw	set_process_alarm_common_display_clock
	.dw	set_process_alarm_common_display_clock
	.dw	set_process_alarm_common_display_clock
	.dw	set_process_alarm_common_display_clock
	.dw	set_process_alarm_common_display_mode
	.dw	set_process_alarm_common_display_chime
	.dw	set_process_alarm_common_display_chimetype

set_disp_value_dday:
	.dw	set_process_dday_common_display_date
	.dw	set_process_dday_common_display_date
	.dw	set_process_dday_common_display_date
	.dw	set_process_dday_common_display_date
	.dw	set_process_dday_common_display_date
	.dw	set_process_dday_common_display_date
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message
	.dw	set_process_dday_common_display_message

set_disp_value_display:
	.dw	set_process_disp_common_display_dotact
	.dw	set_process_disp_common_display_mode
	.dw	set_process_disp_common_display_1224
	.dw	set_process_disp_common_display_night
	.dw	set_process_disp_common_display_day
;	.dw	set_process_disp_common_display_adc
;	.dw	set_process_disp_common_display_adc
	.dw	set_process_disp_common_display_manual
	.dw	set_process_disp_common_display_font
	.dw	set_process_disp_common_display_eff
	.dw	set_process_disp_common_display_effspeed
	.dw	set_process_disp_common_display_waittime
	.dw	set_process_disp_common_display_waitdate
	.dw	set_process_disp_common_display_waittemp
	.dw	set_process_disp_common_display_waitdday
	.dw	set_process_disp_common_display_waitlogo

set_disp_value_remote:
	.dw	set_process_alarm_common_remote_mode

set_disp_value_game:
	.dw	set_process_game_select
	.dw	set_process_game_jump

set_disp_value_quickmemo:
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display
	.dw	set_process_quickmemo_common_display

set_process_ram_addr_list:
	.dw	set_process_ram_clock*2
	.dw	set_process_ram_alarm*2
	.dw	set_process_ram_dday*2
	.dw	set_process_ram_display*2
	.dw	set_process_ram_remote*2
	.dw	set_process_ram_game*2
	.dw	set_process_ram_quickmemo*2

set_process_ram_clock:
	.dw	menu_value+0
	.dw	menu_value+0
	.dw	menu_value+1
	.dw	menu_value+1
	.dw	menu_value+2
	.dw	menu_value+2
	.dw	menu_value+4
	.dw	menu_value+4
	.dw	menu_value+5
	.dw	menu_value+5
	.dw	menu_value+6


set_process_ram_alarm:
	.dw	menu_value+2
	.dw	menu_value+2
	.dw	menu_value+1
	.dw	menu_value+1
	.dw	menu_value+0
	.dw	menu_value+3
	.dw	menu_value+4

set_process_ram_dday:
	.dw	menu_value+12
	.dw	menu_value+12
	.dw	menu_value+11
	.dw	menu_value+11
	.dw	menu_value+10
	.dw	menu_value+10
	.dw	menu_value+9
	.dw	menu_value+8
	.dw	menu_value+7
	.dw	menu_value+6
	.dw	menu_value+5
	.dw	menu_value+4
	.dw	menu_value+3
	.dw	menu_value+2
	.dw	menu_value+1
	.dw	menu_value+0

set_process_ram_display:
set_process_ram_remote:
set_process_ram_game:
	.dw	menu_value+0
	.dw	menu_value+0
	.dw	menu_value+0
	.dw	menu_value+1
	.dw	menu_value+2
;	.dw	menu_value+3
;	.dw	menu_value+3
	.dw	menu_value+4
	.dw	menu_value+5
	.dw	menu_value+6
	.dw	menu_value+7
	.dw	menu_value+8
	.dw	menu_value+9
	.dw	menu_value+10
	.dw	menu_value+11
	.dw	menu_value+12

set_process_ram_quickmemo:
	.dw	menu_value+0
	.dw	menu_value+1
	.dw	menu_value+2
	.dw	menu_value+3
	.dw	menu_value+4
	.dw	menu_value+5
	.dw	menu_value+6
	.dw	menu_value+7
	.dw	menu_value+8
	.dw	menu_value+9


set_msg_upper_clock:
	.db "Set Year.            ","    Year             "
	.db "Set Year.            ","    Year             "
	.db "Set Month.           ","    Month            "
	.db "Set Month.           ","    Month            "
	.db "Set Day.             ","    Day              "
	.db "Set Day.             ","    Day              "
	.db "Set Hour.            ","    Hour             "
	.db "Set Hour.            ","    Hour             "
	.db "Set Minute.          ","    Minute.          "
	.db "Set Minute.          ","    Minute.          "
	.db "Clear Second.        ","      Second         "


set_msg_upper_alarm:
	.db "Set       Hour.      ","    Alarm Hour       "
	.db "Set       Hour.      ","    Alarm Hour       "
	.db "Set       Minute.    ","    Alarm Minute     "
	.db "Set       Minute.    ","    Alarm Minute     "
	.db "Set       Mode.      ","    Alarm Mode       "
	.db "Set       Mode.      ","    Chime Mode       "
	.db "Set       Type.      ","    Chime Type       "


set_msg_upper_dday:
	.db "Set       Year.      ","    D-Day Year       "
	.db "Set       Year.      ","    D-Day Year       "
	.db "Set       Month.     ","    D-Day Month      "
	.db "Set       Month.     ","    D-Day Month      "
	.db "Set       Day.       ","    D-Day Day        "
	.db "Set       Day.       ","    D-Day Day        "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "
	.db "Input       Message. ","      D-Day Message  "

set_msg_upper_display:
	.db "Set Dot-Matrix Type. ","    Dot-Matrix Type  "
	.db "       mode & E-Save.","Bright mode   E-Save "
	.db "Set 12/24 Hour Mode. ","    12 24 Hour Mode  "
	.db "Set Auto Bright Day. ","    Auto Bright Day  "
	.db "Set Auto Bright Night","    Auto Bright Night"
;	.db	"SET vs    "
;	.db	"SET    CDS"
;	.db	"SET vs    "
;	.db	"SET    CDS"
	.db "Manual Bright Control","       Bright Control"
	.db "Set Font.            ","    Font             "
	.db "Set Display Effect.  ","    Display Effect   "
	.db "Set Disp Effect Speed","    Disp Effect Speed"
	.db "Display Wait Time.   ","        Wait Time.   "
	.db "Display Wait Date.   ","        Wait Date.   "
	.db "Display Wait Temp.   ","        Wait Temp.   "
	.db "Display Wait D-Day.  ","        Wait D-Day   "
	.db "Display Wait Logo.   ","        Wait Logo.   "

set_msg_upper_remote:
	.db "Set Remocon Type.    ","    Remocon Type     "

set_msg_upper_game:
	.db	"Select.     !        ","        Game         "

set_msg_upper_quickmemo:
	.db	"      Memo. 1/10     ","Quick Memo  1        "
	.db	"      Memo. 2/10     ","Quick Memo  2        "
	.db	"      Memo. 3/10     ","Quick Memo  3        "
	.db	"      Memo. 4/10     ","Quick Memo  4        "
	.db	"      Memo. 5/10     ","Quick Memo  5        "
	.db	"      Memo. 6/10     ","Quick Memo  6        "
	.db	"      Memo. 7/10     ","Quick Memo  7        "
	.db	"      Memo. 8/10     ","Quick Memo  8        "
	.db	"      Memo. 9/10     ","Quick Memo  9        "
	.db	"      Memo. 10/10    ","Quick Memo  10       "

eep_init_msg:
	.db	" Init EEP!"

rtc_init_msg:
	.db	" Init RTC!"

set_load_value_remote_fail_msg:
	.db	" Key Only!"

set_load_value_clock_fail_msg:
	.db	" GPS Mode!"

menu_sub_end_pass:
	.db	" Sorting! "

menu_out_count_msg:
	.db	" Too Late!"

; ¸ÞÀθ޴º ¼øȯ½Ã È­¸é¿¡ ¼ø¼­´ë·Î Ç¥½ÃÇÒ ¸Þ½ÃÁö.
; Main menu to display this message on LED.
menu_main_list:
	.db	"Time set? "	; menu 1 green
	.db	"Time      "	; menu 1 red
	.db	"Alarm set?"	; menu 2
	.db	"Alarm     "
	.db	"D-day Set?"	; menu 3
	.db	"D-day     "
	.db	"Disp. Set?"	; menu 4
	.db	"Disp.     "
	.db	"Remot Set?"	; menu 5
	.db	"Remot     "
	.db	"Play Game?"	; menu 6
	.db	"     Game "
	.db	"View Memo?"	; menu 7
	.db	"     Memo "

menu_main_sel:
yes_no_menu:
	.db	"  YES  NO "

set_process_alarm_common_display_mode_msg:
	.db "ALARM OFF "
	.db "   ONCE   "
	.db " EVERYDAY "
	.db "  WEEKDAY "
	.db "  WEEKEND "

set_process_disp_common_display_dotact_msg:
	.db	"Active Low"
	.db	"ActiveHigh"

set_process_disp_common_display_1224_msg:
	.db	" 12hr Mode"
	.db	" 24hr Mode"

set_process_disp_common_display_mode_msg:
	.db	"  Manual  "
	.db	"Manu+ESAVE"
	.db	"Auto Ctrl."
	.db	"Auto+ESAVE"

set_process_alarm_common_display_chimetype_msg:
	.db	"Beep long "
	.db	"Beep short"

set_process_alarm_common_display_chime_msg:
	.db	"Always Off"
	.db	"Always On "
	.db	"  Day On  "

set_process_disp_common_display_degree_msg:
	.db	"       1/8"
	.db	"_      2/8"
	.db	"_",0xaa,"     3/8"
	.db	"_",0xaa,0xab,"    4/8"
	.db	"_",0xaa,0xab,0xac,"   5/8"
	.db	"_",0xaa,0xab,0xac,0xad,"  6/8"
	.db	"_",0xaa,0xab,0xac,0xad,0xae," 7/8"
	.db	"_",0xaa,0xab,0xac,0xad,0xae,0xaf,"8/8"

set_process_disp_common_display_font_msg:
	.db	" Fixed sys"
	.db	"ScriptBold"
	.db	"ScriptSlim"
	.db	" Segment  "

set_process_disp_common_display_eff_msg:
	.db	" Line Feed"
	.db	" Scr. Down"
	.db	"   Snow   "
	.db	"Fade InOut"
	.db	"No Effect "

set_process_disp_common_display_effspeed_msg:
	.db "  Quickly "
	.db "  Normal  "
	.db	"  Slowly  "

set_process_disp_common_display_wait_msg:
	.db	" Not Use  "
	.db	" Use 1sec "
	.db	" Use 2sec "
	.db	" Use 4sec "
	.db	" Use 8sec "

set_process_alarm_common_remote_mode_msg:
	.db	"   LG TV  "
	.db	"SAMSUNG TV"
	.db	"  KT QOOK "
	.db	" SKY LIFE "

set_process_game_select_msg:
	.db	"  Tetris  "
	.db	"  Snake   "

set_process_disp_common_display_bright_check_list:
	.db	28,50,75,120,155,200,250,255

set_process_game_jump_list:
;.dq	0
;	.dw	play_game_tetris
;	.dw	play_game_tetris
;	.dw	play_game_snake


check_alarm_chime_type_routine:
	.dw	sound_oclock
	.dw	sound_oclock2

ir_custom_list:
	; for LG TV(a/b)
	.db	0x04,0xFB
	; for SAMSUNG TV
	.db	0x07,0x07
	; for QOOK KT MEGA TV STB
	.db	0x39,0x15
	; for SKY-LIFE STB
	.db	0x48,0x24

	;	0, 1, 2, 3, 4, 5, 6, 7, 8, 9, MENU+, MENU-, MENU<, MENU>, ENTER, CANCLE, PWR, VOL+, VOL-, CH+, CH-
ir_data_list:	; for LG TV
	.db	0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x40,0x41,0x07,0x06,0x44,0x5b,0x08,0x02,0x03,0x00,0x01,0,0,0
	; for SAMSUNG TV
	.db	0x11,0x04,0x05,0x06,0x08,0x09,0x0a,0x0c,0x0d,0x0e,0x60,0x61,0x65,0x62,0x68,0x58,0x02,0x07,0x0b,0x12,0x10,0,0,0
	; for QOOK KT MEGA TV STB
	.db	0x0c,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x11,0x15,0x12,0x14,0x13,0x61,0x00,0x1f,0x40,0x49,0x4a,0,0,0
	; for SKY-LIFE STB
	.db	0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x1a,0x1b,0x1d,0x1c,0x1f,0x19,0x0c,0x13,0x14,0x17,0x18,0,0,0

uart_tx_list:
	.db	"$PSRF201,NMEA9600,NULL38400,GGA0,GLL0,GSA0,GSV0,RMC1,VTG0,USER0*0C",0x0A,0x0D,0,0
;	.db	"$PSRF101,0,0,0,000,0,0,12,8*1C",0,0	; factory set
;	.db	"$PSRF101,0,0,0,000,0,0,12,4*10",13,0	; cold start
;.org	uart_tx_list+20
;	.db	"$PSRF101,0,0,0,000,0,0,12,2*16",13,0	; warm start
;.org	uart_tx_list+40
;	.db	"$PSRF101,0,0,0,000,0,0,12,1*15",13,0	; hot start
;.org	uart_tx_list+60
;	.db	"$PSRF101,0,0,0,000,0,0,12,8*1C",13,0	; factory set


rtc_init:	; RTC is used this initialize values
	.db	0x00,0x00,0x00|0x00,0x05,0x01,0x01,0x00,0

check_value_eeprom_init:
	.db	0|0x00,7,3,000,5,0,0,2,4,1,1,1,1,0,0x00,0x07,1,1,0x7f,"TFOS-BEL",0x7e,0x24,0x02,0x11,"0123456789",0,0,0
check_value_eeprom:
	.db	5|0x80,7,7,255,7,3,4,3,6,6,6,6,6,4,0x59,0x12,2,1,0x7f,0x7f,0x7f,0x7f,0x7f,0x7f,0x7f,0x7f,0x7f,0x7f,0x31,0x12,0x99,0x39,0x39,0x39,0x39,0x39,0x39,0x39,0x39,0x39,0x39,3,0,0


; ¼¼ºÎ ¸Þ´º·Î ÁøÀÔÇÒ ÁÖ¼Ò
; sub menu address
menu_main_address:
	.dw	menu_sub_entry
	.dw	menu_sub_entry
	.dw	menu_sub_entry
	.dw	menu_sub_entry
	.dw	menu_sub_entry
	.dw	menu_sub_entry
	.dw	menu_sub_entry


; Small Alphabet Fonts
font_5x8:
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	;	blank
	.db	~$04,~$04,~$04,~$04,~$00,~$00,~$04,~$00	;	!
	.db	~$0a,~$0a,~$0a,~$00,~$00,~$00,~$00,~$00	;	"
	.db	~$0a,~$0a,~$1f,~$0a,~$1f,~$0a,~$0a,~$00	;	#
	.db	~$04,~$0f,~$14,~$0e,~$05,~$1e,~$04,~$00	;	$
	.db	~$18,~$19,~$02,~$04,~$08,~$13,~$03,~$00	;	%
	.db	~$0c,~$12,~$14,~$08,~$15,~$12,~$0d,~$00	;	&
	.db	~$0c,~$04,~$08,~$00,~$00,~$00,~$00,~$00	;	'
	.db	~$02,~$04,~$08,~$08,~$08,~$04,~$02,~$00	;	(
	.db	~$08,~$04,~$02,~$02,~$02,~$04,~$08,~$00	;	)
	.db	~$00,~$04,~$15,~$0e,~$15,~$04,~$00,~$00	;	*
	.db	~$00,~$04,~$04,~$1f,~$04,~$04,~$00,~$00	;	+
	.db	~$00,~$00,~$00,~$00,~$0c,~$04,~$08,~$00	;	,
	.db	~$00,~$00,~$00,~$1f,~$00,~$00,~$00,~$00	;	-
	.db	~$00,~$00,~$00,~$00,~$00,~$0c,~$0c,~$00	;	.
	.db	~$00,~$01,~$02,~$04,~$08,~$10,~$00,~$00	;	/
	.db	~$0e,~$11,~$13,~$15,~$19,~$11,~$0e,~$00	;	0
	.db	~$04,~$0c,~$04,~$04,~$04,~$04,~$0e,~$00	;	1
	.db	~$0e,~$11,~$01,~$02,~$04,~$08,~$1f,~$00	;	2
	.db	~$0e,~$11,~$01,~$06,~$01,~$11,~$0e,~$00	;	3
	.db	~$02,~$06,~$0a,~$12,~$1f,~$02,~$02,~$00	;	4
	.db	~$1f,~$10,~$1e,~$01,~$01,~$11,~$0e,~$00	;	5
	.db	~$06,~$08,~$10,~$1e,~$11,~$11,~$0e,~$00	;	6
	.db	~$1f,~$01,~$02,~$04,~$08,~$08,~$08,~$00	;	7
	.db	~$0e,~$11,~$11,~$0e,~$11,~$11,~$0e,~$00	;	8
	.db	~$0e,~$11,~$11,~$0f,~$01,~$02,~$0c,~$00	;	9
	.db	~$00,~$0c,~$0c,~$00,~$0c,~$0c,~$00,~$00	;	:
	.db	~$00,~$0c,~$0c,~$00,~$0c,~$04,~$08,~$00	;	;
	.db	~$02,~$04,~$08,~$10,~$08,~$04,~$02,~$00	;	<
	.db	~$00,~$00,~$1f,~$00,~$1f,~$00,~$00,~$00	;	=
	.db	~$08,~$04,~$02,~$01,~$02,~$04,~$08,~$00	;	>
	.db	~$0e,~$11,~$01,~$02,~$04,~$00,~$04,~$00	;	?
	.db	~$0e,~$11,~$13,~$15,~$19,~$11,~$0e,~$00	;	@
	.db	~$04,~$0a,~$11,~$11,~$1f,~$11,~$11,~$00 ;	A
	.db	~$1e,~$11,~$11,~$1e,~$11,~$11,~$1e,~$00	;	B
	.db	~$0e,~$11,~$10,~$10,~$10,~$11,~$0e,~$00	;	C
	.db	~$1c,~$12,~$11,~$11,~$11,~$12,~$1c,~$00	;	D
	.db	~$1f,~$10,~$10,~$1e,~$10,~$10,~$1f,~$00	;	E
	.db	~$1f,~$10,~$10,~$1e,~$10,~$10,~$10,~$00	;	F
	.db	~$0e,~$11,~$10,~$17,~$11,~$11,~$0f,~$00	;	G
	.db	~$11,~$11,~$11,~$1f,~$11,~$11,~$11,~$00	;	H
	.db	~$0e,~$04,~$04,~$04,~$04,~$04,~$0e,~$00	;	I
	.db	~$07,~$02,~$02,~$02,~$02,~$12,~$0c,~$00	;	J
	.db	~$11,~$12,~$14,~$18,~$14,~$12,~$11,~$00	;	K
	.db	~$10,~$10,~$10,~$10,~$10,~$10,~$1f,~$00	;	L
	.db	~$11,~$1b,~$1b,~$15,~$15,~$11,~$11,~$00 ;	M
	.db	~$11,~$11,~$19,~$15,~$13,~$11,~$11,~$00 ;	N
	.db	~$0e,~$11,~$11,~$11,~$11,~$11,~$0e,~$00 ;	O
	.db	~$1e,~$11,~$11,~$1e,~$10,~$10,~$10,~$00 ;	P
	.db	~$0e,~$11,~$11,~$11,~$15,~$12,~$0d,~$00	;	Q
	.db	~$1e,~$11,~$11,~$1e,~$14,~$12,~$11,~$00	;	R
	.db	~$0f,~$10,~$10,~$0e,~$01,~$01,~$1e,~$00	;	S
	.db	~$1f,~$04,~$04,~$04,~$04,~$04,~$04,~$00	;	T
	.db	~$11,~$11,~$11,~$11,~$11,~$11,~$0e,~$00	;	U
	.db	~$11,~$11,~$11,~$11,~$11,~$0a,~$04,~$00	;	V
	.db	~$11,~$11,~$11,~$15,~$15,~$15,~$0a,~$00	;	W
	.db	~$11,~$11,~$0a,~$04,~$0a,~$11,~$11,~$00	;	X
	.db	~$11,~$11,~$11,~$0a,~$04,~$04,~$04,~$00	;	Y
	.db	~$1f,~$01,~$02,~$04,~$08,~$10,~$1f,~$00	;	Z
	.db	~$0e,~$08,~$08,~$08,~$08,~$08,~$0e,~$00	;	[
	.db	~$11,~$0a,~$1f,~$04,~$1f,~$04,~$04,~$00	;	en(jp)
	.db	~$0e,~$02,~$02,~$02,~$02,~$02,~$0e,~$00	;	]
	.db	~$04,~$0a,~$11,~$00,~$00,~$00,~$00,~$00	;	^
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$1f,~$00	;	_
	.db	~$08,~$04,~$02,~$00,~$00,~$00,~$00,~$00	;	'
	.db	~$00,~$00,~$0e,~$01,~$0f,~$11,~$0f,~$00 ;	a
	.db	~$10,~$10,~$16,~$19,~$11,~$11,~$1e,~$00	;	b
	.db	~$00,~$00,~$0e,~$10,~$10,~$11,~$0e,~$00	;	c
	.db	~$01,~$01,~$0d,~$13,~$11,~$11,~$0f,~$00	;	d
	.db	~$00,~$00,~$0e,~$11,~$1f,~$10,~$0e,~$00	;	e
	.db	~$06,~$09,~$08,~$1c,~$08,~$08,~$08,~$00	;	f
	.db	~$00,~$00,~$0f,~$11,~$11,~$0f,~$01,~$0e	;	g
	.db	~$10,~$10,~$16,~$19,~$11,~$11,~$11,~$00	;	h
	.db	~$04,~$00,~$0c,~$04,~$04,~$04,~$0e,~$00	;	i
	.db	~$02,~$00,~$06,~$02,~$02,~$12,~$0c,~$00	;	j
	.db	~$10,~$10,~$12,~$14,~$18,~$14,~$12,~$00	;	k
	.db	~$0c,~$04,~$04,~$04,~$04,~$04,~$0e,~$00	;	l
	.db	~$00,~$00,~$1a,~$15,~$15,~$11,~$11,~$00 ;	m
	.db	~$00,~$00,~$16,~$19,~$11,~$11,~$11,~$00 ;	n
	.db	~$00,~$00,~$0e,~$11,~$11,~$11,~$0e,~$00 ;	o
	.db	~$00,~$00,~$1e,~$11,~$11,~$1e,~$10,~$10 ;	p
	.db	~$00,~$00,~$0d,~$13,~$13,~$0f,~$01,~$01	;	q
	.db	~$00,~$00,~$16,~$19,~$10,~$10,~$10,~$00	;	r
	.db	~$00,~$00,~$0e,~$10,~$0e,~$01,~$1e,~$00	;	s
	.db	~$00,~$08,~$1c,~$08,~$08,~$09,~$06,~$00	;	t
	.db	~$00,~$00,~$11,~$11,~$11,~$13,~$0d,~$00	;	u
	.db	~$00,~$00,~$11,~$11,~$11,~$0a,~$04,~$00	;	v
	.db	~$00,~$00,~$11,~$11,~$15,~$15,~$0a,~$00	;	w
	.db	~$00,~$00,~$11,~$0a,~$04,~$0a,~$11,~$00	;	x
	.db	~$00,~$00,~$11,~$11,~$0f,~$01,~$11,~$0e	;	y
	.db	~$00,~$00,~$1f,~$02,~$04,~$08,~$1f,~$00	;	z
	.db	~$02,~$04,~$04,~$08,~$04,~$04,~$02,~$00	;	(
	.db	~$04,~$04,~$04,~$04,~$04,~$04,~$04,~$00	;	|
	.db	~$08,~$04,~$04,~$02,~$04,~$04,~$08,~$00	;	)
	.db	~$08,~$0c,~$0e,~$0f,~$0e,~$0c,~$08,~$00	;	->
	.db	~$02,~$06,~$0e,~$1e,~$0e,~$06,~$02,~$00	;	<-

	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	;	blank
	.db	~$00,~$00,~$0e,~$11,~$1f,~$11,~$11,~$00 ;	A	0x81
	.db	~$00,~$00,~$1e,~$11,~$1e,~$11,~$1e,~$00	;	B
	.db	~$00,~$00,~$0e,~$11,~$10,~$11,~$0e,~$00	;	C
	.db	~$00,~$00,~$1e,~$09,~$09,~$09,~$1e,~$00	;	D
	.db	~$00,~$00,~$1f,~$10,~$1e,~$10,~$1f,~$00	;	E
	.db	~$00,~$00,~$1f,~$10,~$1e,~$10,~$10,~$00	;	F
	.db	~$00,~$00,~$0e,~$10,~$17,~$11,~$0f,~$00	;	G
	.db	~$00,~$00,~$11,~$11,~$1f,~$11,~$11,~$00	;	H
	.db	~$00,~$00,~$0e,~$04,~$04,~$04,~$0e,~$00	;	I
	.db	~$00,~$00,~$07,~$02,~$02,~$12,~$0c,~$00	;	J
	.db	~$00,~$00,~$11,~$12,~$1c,~$12,~$11,~$00	;	K
	.db	~$00,~$00,~$10,~$10,~$10,~$10,~$1f,~$00	;	L
	.db	~$00,~$00,~$11,~$1b,~$15,~$11,~$11,~$00 ;	M
	.db	~$00,~$00,~$11,~$19,~$15,~$13,~$11,~$00 ;	N
	.db	~$00,~$00,~$0e,~$11,~$11,~$11,~$0e,~$00 ;	O
	.db	~$00,~$00,~$1e,~$11,~$1e,~$10,~$10,~$00 ;	P	0x90
	.db	~$00,~$00,~$0e,~$11,~$15,~$12,~$0d,~$00	;	Q
	.db	~$00,~$00,~$1e,~$11,~$1e,~$12,~$11,~$00	;	R
	.db	~$00,~$00,~$0f,~$10,~$0e,~$01,~$1e,~$00	;	S
	.db	~$00,~$00,~$1f,~$04,~$04,~$04,~$04,~$00	;	T
	.db	~$00,~$00,~$11,~$11,~$11,~$11,~$0e,~$00	;	U
	.db	~$00,~$00,~$11,~$11,~$11,~$0a,~$04,~$00	;	V
	.db	~$00,~$00,~$11,~$11,~$15,~$1b,~$11,~$00	;	W
	.db	~$00,~$00,~$11,~$0a,~$04,~$0a,~$11,~$00	;	X
	.db	~$00,~$00,~$11,~$11,~$0a,~$04,~$04,~$00	;	Y
	.db	~$00,~$00,~$1f,~$02,~$04,~$08,~$1f,~$00	;	Z

	.db	~$08,~$0c,~$3e,~$3f,~$3e,~$0c,~$08,~$00	;	; 0x9b
	.db	~$00,~$00,~$00,~$1f,~$0e,~$04,~$04,~$04	;	ANT ICON	0x9c
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	;	0x9d
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	;	0x9e
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	;	0x9f

	.db	~$00,~$00,~$0e,~$13,~$15,~$19,~$0e,~$00	;	0	0xa0
	.db	~$00,~$00,~$04,~$0c,~$04,~$04,~$0e,~$00	;	1
	.db	~$00,~$00,~$1e,~$01,~$0f,~$10,~$1f,~$00	;	2
	.db	~$00,~$00,~$1e,~$01,~$1e,~$01,~$1e,~$00	;	3
	.db	~$00,~$00,~$02,~$06,~$0a,~$1f,~$02,~$00	;	4
	.db	~$00,~$00,~$1f,~$10,~$1e,~$01,~$1e,~$00	;	5
	.db	~$00,~$00,~$0e,~$10,~$1e,~$11,~$0e,~$00	;	6
	.db	~$00,~$00,~$1f,~$11,~$02,~$04,~$04,~$00	;	7
	.db	~$00,~$00,~$0e,~$11,~$0e,~$11,~$0e,~$00	;	8
	.db	~$00,~$00,~$0e,~$11,~$0f,~$01,~$0e,~$00	;	9	0xa9

	.db	~$00,~$00,~$00,~$00,~$00,~$1f,~$1f,~$00	;	2/7	; 0xaa; _ : '_' ; blank : ' '
	.db	~$00,~$00,~$00,~$00,~$1f,~$1f,~$1f,~$00	;	3/7
	.db	~$00,~$00,~$00,~$1f,~$1f,~$1f,~$1f,~$00	;	4/7
	.db	~$00,~$00,~$1f,~$1f,~$1f,~$1f,~$1f,~$00	;	5/7
	.db	~$00,~$1f,~$1f,~$1f,~$1f,~$1f,~$1f,~$00	;	6/7
	.db	~$1f,~$1f,~$1f,~$1f,~$1f,~$1f,~$1f,~$00	;	7/7	; 0xaf

	.db	~$18,~$78,~$30,~$10,~$00,~$00,~$00,~$00	; bell green	; 0xb0
;	.db	~$00,~$00,~$00,~$08,~$70,~$70,~$10,~$00	; bell red	;0xb1	; 1/2
;	.db	~$00,~$00,~$00,~$08,~$70,~$30,~$30,~$00	; bell red	;0xb2	; 2/2
	.db	~$08,~$70,~$30,~$70,~$60,~$00,~$00,~$00	; bell red	;0xb1	; 1/2
	.db	~$08,~$70,~$f0,~$d0,~$00,~$00,~$00,~$00	; bell red	;0xb2	; 2/2
;	.db	~$06,~$0b,~$1d,~$ee,~$74,~$38,~$78,~$68	; bell red	;0xb1	; 1/2
;	.db	~$06,~$0b,~$1d,~$ee,~$74,~$f8,~$d8,~$08	; bell red	;0xb2	; 2/2


	.db	$c0,$9c,$a2,$be,$a2,$a2,$c0,$ff	; AMPM A	; 0xb3
	.db	$c0,$bc,$a2,$bc,$a0,$a0,$c0,$ff	; AMPM P	; 0xb4
	.db	$81,$a2,$b6,$aa,$a2,$a2,$81,$ff	; AMPM M	; 0xb5

/*
11111111
11100011
11011101
11000001
11011101
11011101
11111111
11111111

11111111
11000011
11011101
11000011
11011111
11011111
11111111
11111111

01111111
01011101
01001001
01010101
01011101
01011101
01111111
01111111
*/

; Big Alphabet Fonts
font_8x16:
; Fixed system
	.db	~$00,~$00,~$00,~$3c,~$66,~$6e,~$6e,~$66,~$76,~$76,~$66,~$66,~$3c,~$00,~$00,~$00	  //  0   [48]
	.db	~$00,~$00,~$00,~$0c,~$1c,~$7c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$00,~$00,~$00	  //  1   [49]
	.db	~$00,~$00,~$00,~$3c,~$66,~$66,~$06,~$0c,~$18,~$30,~$60,~$60,~$7e,~$00,~$00,~$00	  //  2   [50]
	.db	~$00,~$00,~$00,~$3c,~$66,~$66,~$06,~$1c,~$06,~$66,~$66,~$66,~$3c,~$00,~$00,~$00	  //  3   [51]
	.db	~$00,~$00,~$00,~$30,~$30,~$36,~$36,~$36,~$66,~$7f,~$06,~$06,~$06,~$00,~$00,~$00	  //  4   [52]
	.db	~$00,~$00,~$00,~$7e,~$60,~$60,~$60,~$7c,~$06,~$06,~$06,~$0c,~$78,~$00,~$00,~$00	  //  5   [53]
	.db	~$00,~$00,~$00,~$0e,~$18,~$30,~$60,~$7c,~$66,~$66,~$66,~$66,~$3c,~$00,~$00,~$00	  //  6   [54]
	.db	~$00,~$00,~$00,~$7e,~$06,~$0c,~$0c,~$18,~$18,~$18,~$30,~$30,~$30,~$00,~$00,~$00	  //  7   [55]
	.db	~$00,~$00,~$00,~$3c,~$66,~$66,~$76,~$3c,~$6e,~$66,~$66,~$66,~$3c,~$00,~$00,~$00	  //  8   [56]
	.db	~$00,~$00,~$00,~$3c,~$66,~$66,~$66,~$66,~$3e,~$06,~$06,~$0c,~$38,~$00,~$00,~$00	  //  9   [57]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  blank  [57]
	.db	~$00,~$00,~$18,~$24,~$24,~$18,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00   // 01H	'c	; 0x27
	.db	~$00,~$00,~$00,~$1e,~$33,~$60,~$60,~$60,~$60,~$60,~$60,~$33,~$1e,~$00,~$00,~$00	  //  C   [67]
	.db	~$00,~$00,~$06,~$06,~$0c,~$0c,~$18,~$18,~$30,~$30,~$60,~$60,~$c0,~$c0,~$00,~$00	  //  /   [47]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$18,~$18,~$00,~$00,~$00,~$00	  //  .   [46]
	.db	~$00,~$00,~$00,~$00,~$00,~$18,~$18,~$00,~$00,~$18,~$18,~$00,~$00,~$00,~$00,~$00	  //  :   [58]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$7e,~$7e,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  - (minus)

; Pilgui-(Big)
	.db	~$00,~$00,~$00,~$0e,~$1b,~$33,~$73,~$63,~$66,~$66,~$6c,~$38,~$00,~$00,~$00,~$00		; 0
	.db	~$00,~$00,~$00,~$06,~$06,~$0c,~$0c,~$0c,~$18,~$18,~$18,~$30,~$30,~$00,~$00,~$00		; 1
	.db	~$00,~$00,~$00,~$1e,~$33,~$03,~$03,~$06,~$0e,~$0c,~$18,~$7f,~$00,~$00,~$00,~$00		; 2
	.db	~$00,~$00,~$00,~$1e,~$33,~$07,~$1c,~$3e,~$06,~$06,~$0c,~$18,~$f0,~$00,~$00,~$00		; 3
	.db	~$00,~$00,~$00,~$03,~$1b,~$33,~$36,~$36,~$66,~$7e,~$0f,~$0c,~$1c,~$00,~$00,~$00		; 4
	.db	~$00,~$00,~$00,~$1f,~$18,~$30,~$30,~$3e,~$03,~$03,~$06,~$1c,~$70,~$00,~$00,~$00		; 5
	.db	~$00,~$00,~$03,~$06,~$0c,~$18,~$30,~$3e,~$73,~$63,~$63,~$6e,~$3c,~$00,~$00,~$00		; 6
	.db	~$00,~$00,~$00,~$00,~$7f,~$03,~$06,~$06,~$0c,~$0c,~$18,~$18,~$18,~$30,~$00,~$00		; 7
	.db	~$00,~$00,~$00,~$1e,~$3b,~$33,~$36,~$1c,~$3c,~$66,~$66,~$6e,~$3c,~$00,~$00,~$00		; 8
	.db	~$00,~$00,~$00,~$1e,~$3b,~$63,~$63,~$67,~$3e,~$06,~$0c,~$18,~$30,~$60,~$00,~$00		; 9
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  blank  [57]
	.db	~$00,~$00,~$10,~$28,~$10,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00 ; 01H	'c	; 0x27
	.db	~$00,~$00,~$00,~$1e,~$33,~$60,~$60,~$c3,~$c6,~$c6,~$dc,~$78,~$00,~$00,~$00,~$00	  //  C   [67]
	.db	~$00,~$00,~$00,~$06,~$06,~$0c,~$0c,~$18,~$18,~$30,~$30,~$60,~$60,~$00,~$00,~$00	  //  /   [47]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$18,~$18,~$00,~$00,~$00,~$00	  //  .   [46]
	.db	~$00,~$00,~$00,~$00,~$0c,~$0c,~$00,~$00,~$00,~$18,~$18,~$00,~$00,~$00,~$00,~$00	  //  :   [58]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$7e,~$7e,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  - (minus)

; Pilgui-(slim)
	.db	~$00,~$00,~$0e,~$19,~$31,~$21,~$61,~$41,~$42,~$42,~$46,~$4c,~$38,~$00,~$00,~$00		; 0
	.db	~$00,~$00,~$04,~$04,~$04,~$08,~$08,~$08,~$10,~$10,~$10,~$10,~$20,~$00,~$00,~$00		; 1
	.db	~$00,~$00,~$00,~$1c,~$22,~$02,~$02,~$04,~$04,~$08,~$10,~$20,~$7e,~$00,~$00,~$00		; 2
	.db	~$00,~$00,~$1c,~$62,~$02,~$0c,~$3c,~$02,~$02,~$04,~$0c,~$10,~$60,~$00,~$00,~$00		; 3
	.db	~$00,~$00,~$01,~$11,~$12,~$22,~$22,~$44,~$44,~$7e,~$09,~$08,~$08,~$00,~$00,~$00		; 4
	.db	~$00,~$00,~$1c,~$22,~$20,~$20,~$30,~$0e,~$02,~$02,~$0c,~$18,~$e0,~$00,~$00,~$00		; 5
	.db	~$00,~$06,~$0c,~$18,~$10,~$20,~$3c,~$62,~$42,~$42,~$44,~$4c,~$30,~$00,~$00,~$00		; 6
	.db	~$00,~$00,~$00,~$7f,~$02,~$02,~$04,~$04,~$08,~$08,~$10,~$10,~$30,~$00,~$00,~$00		; 7
	.db	~$00,~$00,~$0e,~$19,~$11,~$13,~$0c,~$18,~$24,~$42,~$42,~$44,~$38,~$00,~$00,~$00		; 8
	.db	~$00,~$00,~$0c,~$32,~$22,~$42,~$43,~$46,~$3c,~$04,~$08,~$18,~$30,~$60,~$00,~$00		; 9
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  blank  [57]
	.db	~$00,~$00,~$10,~$28,~$10,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00 ; 01H	'c	; 0x27
	.db	~$00,~$00,~$1c,~$32,~$20,~$40,~$40,~$80,~$82,~$82,~$84,~$88,~$70,~$00,~$00,~$00	  //  C   [67]
	.db	~$00,~$00,~$02,~$02,~$04,~$08,~$08,~$10,~$10,~$20,~$20,~$40,~$80,~$00,~$00,~$00	  //  /   [47]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$20,~$00,~$00,~$00,~$00,~$00	  //  .   [46]
	.db	~$00,~$00,~$00,~$00,~$04,~$04,~$00,~$00,~$00,~$10,~$10,~$00,~$00,~$00,~$00,~$00	  //  :   [58]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$fe,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  - (minus)

; Segment
	.db	~$00,~$7f,~$7f,~$63,~$63,~$63,~$63,~$63,~$63,~$63,~$63,~$63,~$63,~$7f,~$7f,~$00	; 0
;	.db	~$00,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$00	; 1
	.db	~$00,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$0c,~$00	; 1
	.db	~$00,~$7f,~$7f,~$03,~$03,~$03,~$03,~$7f,~$7f,~$60,~$60,~$60,~$60,~$7f,~$7f,~$00	; 2
	.db	~$00,~$7f,~$7f,~$03,~$03,~$03,~$03,~$7f,~$7f,~$03,~$03,~$03,~$03,~$7f,~$7f,~$00	; 3
	.db	~$00,~$63,~$63,~$63,~$63,~$63,~$63,~$7f,~$7f,~$03,~$03,~$03,~$03,~$03,~$03,~$00	; 4
	.db	~$00,~$7f,~$7f,~$60,~$60,~$60,~$60,~$7f,~$7f,~$03,~$03,~$03,~$03,~$7f,~$7f,~$00	; 5
	.db	~$00,~$7f,~$7f,~$60,~$60,~$60,~$60,~$7f,~$7f,~$63,~$63,~$63,~$63,~$7f,~$7f,~$00	; 6
	.db	~$00,~$7f,~$7f,~$63,~$63,~$63,~$63,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$03,~$00	; 7
	.db	~$00,~$7f,~$7f,~$63,~$63,~$63,~$63,~$7f,~$7f,~$63,~$63,~$63,~$63,~$7f,~$7f,~$00	; 8
	.db	~$00,~$7f,~$7f,~$63,~$63,~$63,~$63,~$7f,~$7f,~$03,~$03,~$03,~$03,~$7f,~$7f,~$00	; 9
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	  //  blank  [57]
;	.db	~$00,~$18,~$18,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	; c'
	.db	~$00,~$00,~$00,~$06,~$06,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	; c'
;	.db	~$00,~$00,~$00,~$00,~$00,~$06,~$06,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00	; c'
	.db	~$00,~$7f,~$7f,~$60,~$60,~$60,~$60,~$60,~$60,~$60,~$60,~$60,~$60,~$7f,~$7f,~$00	; c
;	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$7f,~$7f,~$60,~$60,~$60,~$60,~$7f,~$7f,~$00	; c
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$7f,~$7f,~$00,~$00,~$00,~$00,~$00,~$00,~$00	; / = -
;	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$18,~$18,~$00	  //  .   [46]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$0c,~$0c,~$00,~$00,~$00	  //  .   [46]
	.db	~$00,~$00,~$00,~$00,~$00,~$18,~$18,~$00,~$00,~$18,~$18,~$00,~$00,~$00,~$00,~$00	  //  :   [58]
	.db	~$00,~$00,~$00,~$00,~$00,~$00,~$00,~$7f,~$7f,~$00,~$00,~$00,~$00,~$00,~$00,~$00	; -



weekday_circle:
	.db	~0b00111111,~0b11111111,~0b11111110,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b01100000,~0b00000000,~0b00000011,0
	.db	~0b00111111,~0b11111111,~0b11111110,0


circle:
	.dq	0b1111111111111111111111111111111111111111111111111111111111111111
	.dq	0b0000111100000000000000000000000000000000000000000000000011110000
	.dq	0b0000001100000000000000000000000000000000000000000000000011000000
	.dq	0b1111001111111111111111111111111111111111111111111111111111001111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111100111111111111111111111111111111111111111111111111110011111
	.dq	0b1111001111111111111111111111111111111111111111111111111111001111
	.dq	0b0000001100000000000000000000000000000000000000000000000011000000
	.dq	0b0000111100000000000000000000000000000000000000000000000011110000
	.dq	0b1111111111111111111111111111111111111111111111111111111111111111

/*
tetris_pattern:
	.dw	~0x00cc	; pattern O
	.dw	~0x00cc
	.dw	~0x00cc
	.dw	~0x00cc

	.dw	~0x000f	; pattern I
	.dw	~0x8888
	.dw	~0x000f
	.dw	~0x8888

	.dw	~0x006c	; pattern S
	.dw	~0x08c4
	.dw	~0x006c
	.dw	~0x08c4

	.dw	~0x00c6	; pattern Z
	.dw	~0x04c8
	.dw	~0x00c6
	.dw	~0x04c8

	.dw	~0x00e4	; pattern T
	.dw	~0x04c4
	.dw	~0x004e
	.dw	~0x08c8

	.dw	~0x00e2	; pattern J
	.dw	~0x044c
	.dw	~0x008e
	.dw	~0x0c88

	.dw	~0x00e8	; pattern L
	.dw	~0x0c44
	.dw	~0x002e
	.dw	~0x088c
*/