; generated by ARM C/C++ Compiler, 5.03 [Build 24]
; commandline ArmCC [--list --debug -c --asm --interleave --bitband -oobj\hldi_ram.o --asm_dir=.\Lst\ --list_dir=.\Lst\ --cpu=Cortex-M3 --apcs=interwork -I\DEVELOP\BIN\Keil\ARM\STARTUP\ST\STM32F10x -I\DEVELOP\BIN\Keil\ARM\RV31\INC -I\DEVELOP\BIN\Keil\ARM\CMSIS\Include -I\DEVELOP\BIN\Keil\ARM\ARMCC\Include -I\DEVELOP\BIN\Keil\ARM\Inc\ST\STM32F10x -D__MICROLIB -DSTM32F10X_MD hldi.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  SetSysClockTo72 PROC
;;;986      */
;;;987    static void SetSysClockTo72(void)
000000  b50c              PUSH     {r2,r3,lr}
;;;988    {
;;;989      __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
000002  2200              MOVS     r2,#0
;;;990      
;;;991      /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
;;;992      /* Enable HSE */    
;;;993      RCC->CR |= ((uint32_t)RCC_CR_HSEON);
000004  48fb              LDR      r0,|L1.1012|
000006  9200              STR      r2,[sp,#0]            ;989
000008  9201              STR      r2,[sp,#4]
00000a  6801              LDR      r1,[r0,#0]
00000c  f4413180          ORR      r1,r1,#0x10000
000010  6001              STR      r1,[r0,#0]
;;;994     
;;;995      /* Wait till HSE is ready and if Time out is reached exit */
;;;996      do
;;;997      {
;;;998        HSEStatus = RCC->CR & RCC_CR_HSERDY;
;;;999        StartUpCounter++;  
;;;1000     } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
000012  f44f63a0          MOV      r3,#0x500
                  |L1.22|
000016  6801              LDR      r1,[r0,#0]            ;998
000018  f4013100          AND      r1,r1,#0x20000        ;998
00001c  9101              STR      r1,[sp,#4]            ;999
00001e  9900              LDR      r1,[sp,#0]            ;999
000020  1c49              ADDS     r1,r1,#1              ;999
000022  9100              STR      r1,[sp,#0]
000024  9901              LDR      r1,[sp,#4]
000026  b911              CBNZ     r1,|L1.46|
000028  9900              LDR      r1,[sp,#0]
00002a  4299              CMP      r1,r3
00002c  d1f3              BNE      |L1.22|
                  |L1.46|
;;;1001   
;;;1002     if ((RCC->CR & RCC_CR_HSERDY) != RESET)
00002e  6801              LDR      r1,[r0,#0]
000030  0389              LSLS     r1,r1,#14
000032  d533              BPL      |L1.156|
;;;1003     {
;;;1004       HSEStatus = (uint32_t)0x01;
000034  2101              MOVS     r1,#1
;;;1005     }
;;;1006     else
;;;1007     {
;;;1008       HSEStatus = (uint32_t)0x00;
;;;1009     }  
;;;1010   
;;;1011     if (HSEStatus == (uint32_t)0x01)
;;;1012     {
;;;1013       /* Enable Prefetch Buffer */
;;;1014       FLASH->ACR |= FLASH_ACR_PRFTBE;
000036  9101              STR      r1,[sp,#4]
000038  49ef              LDR      r1,|L1.1016|
00003a  680a              LDR      r2,[r1,#0]
00003c  f0420210          ORR      r2,r2,#0x10
000040  600a              STR      r2,[r1,#0]
;;;1015   
;;;1016       /* Flash 2 wait state */
;;;1017       FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
000042  680a              LDR      r2,[r1,#0]
000044  f0220203          BIC      r2,r2,#3
000048  600a              STR      r2,[r1,#0]
;;;1018       FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
00004a  680a              LDR      r2,[r1,#0]
00004c  f0420202          ORR      r2,r2,#2
000050  600a              STR      r2,[r1,#0]
;;;1019   
;;;1020    
;;;1021       /* HCLK = SYSCLK */
;;;1022       RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
000052  6841              LDR      r1,[r0,#4]
000054  6041              STR      r1,[r0,#4]
;;;1023         
;;;1024       /* PCLK2 = HCLK */
;;;1025       RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
000056  6841              LDR      r1,[r0,#4]
000058  6041              STR      r1,[r0,#4]
;;;1026       
;;;1027       /* PCLK1 = HCLK */
;;;1028       RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
00005a  6841              LDR      r1,[r0,#4]
00005c  f4416180          ORR      r1,r1,#0x400
000060  6041              STR      r1,[r0,#4]
;;;1029   
;;;1030   #ifdef STM32F10X_CL
;;;1031       /* Configure PLLs ------------------------------------------------------*/
;;;1032       /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
;;;1033       /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
;;;1034           
;;;1035       RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
;;;1036                                 RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
;;;1037       RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
;;;1038                                RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
;;;1039     
;;;1040       /* Enable PLL2 */
;;;1041       RCC->CR |= RCC_CR_PLL2ON;
;;;1042       /* Wait till PLL2 is ready */
;;;1043       while((RCC->CR & RCC_CR_PLL2RDY) == 0)
;;;1044       {
;;;1045       }
;;;1046       
;;;1047      
;;;1048       /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ 
;;;1049       RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
;;;1050       RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
;;;1051                               RCC_CFGR_PLLMULL9); 
;;;1052   #else    
;;;1053       /*  PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
;;;1054       RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
000062  6841              LDR      r1,[r0,#4]
000064  f421117c          BIC      r1,r1,#0x3f0000
000068  6041              STR      r1,[r0,#4]
;;;1055                                           RCC_CFGR_PLLMULL));
;;;1056       RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
00006a  6841              LDR      r1,[r0,#4]
00006c  f44111e8          ORR      r1,r1,#0x1d0000
000070  6041              STR      r1,[r0,#4]
;;;1057   #endif /* STM32F10X_CL */
;;;1058   
;;;1059       /* Enable PLL */
;;;1060       RCC->CR |= RCC_CR_PLLON;
000072  6801              LDR      r1,[r0,#0]
000074  f0417180          ORR      r1,r1,#0x1000000
000078  6001              STR      r1,[r0,#0]
                  |L1.122|
;;;1061   
;;;1062       /* Wait till PLL is ready */
;;;1063       while((RCC->CR & RCC_CR_PLLRDY) == 0)
00007a  6801              LDR      r1,[r0,#0]
00007c  0189              LSLS     r1,r1,#6
00007e  d5fc              BPL      |L1.122|
;;;1064       {
;;;1065       }
;;;1066       
;;;1067       /* Select PLL as system clock source */
;;;1068       RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
000080  6841              LDR      r1,[r0,#4]
000082  f0210103          BIC      r1,r1,#3
000086  6041              STR      r1,[r0,#4]
;;;1069       RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
000088  6841              LDR      r1,[r0,#4]
00008a  f0410102          ORR      r1,r1,#2
00008e  6041              STR      r1,[r0,#4]
                  |L1.144|
;;;1070   
;;;1071       /* Wait till PLL is used as system clock source */
;;;1072       while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
000090  6841              LDR      r1,[r0,#4]
000092  f3c10181          UBFX     r1,r1,#2,#2
000096  2902              CMP      r1,#2
000098  d1fa              BNE      |L1.144|
;;;1073       {
;;;1074       }
;;;1075     }
;;;1076     else
;;;1077     { /* If HSE fails to start-up, the application will have wrong clock 
;;;1078            configuration. User can add here some code to deal with this error */
;;;1079     }
;;;1080   }
00009a  bd0c              POP      {r2,r3,pc}
                  |L1.156|
00009c  9201              STR      r2,[sp,#4]            ;1008
00009e  bd0c              POP      {r2,r3,pc}
;;;1081   #endif
                          ENDP

                  SystemInit PROC
;;;211      */
;;;212    void SystemInit (void)
0000a0  48d4              LDR      r0,|L1.1012|
;;;213    {
0000a2  b510              PUSH     {r4,lr}
;;;214      /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
;;;215      /* Set HSION bit */
;;;216      RCC->CR |= (uint32_t)0x00000001;
0000a4  6801              LDR      r1,[r0,#0]
0000a6  f0410101          ORR      r1,r1,#1
0000aa  6001              STR      r1,[r0,#0]
;;;217    
;;;218      /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
;;;219    #ifndef STM32F10X_CL
;;;220      RCC->CFGR &= (uint32_t)0xF8FF0000;
0000ac  6841              LDR      r1,[r0,#4]
0000ae  4ad3              LDR      r2,|L1.1020|
0000b0  4011              ANDS     r1,r1,r2
0000b2  6041              STR      r1,[r0,#4]
;;;221    #else
;;;222      RCC->CFGR &= (uint32_t)0xF0FF0000;
;;;223    #endif /* STM32F10X_CL */   
;;;224      
;;;225      /* Reset HSEON, CSSON and PLLON bits */
;;;226      RCC->CR &= (uint32_t)0xFEF6FFFF;
0000b4  6801              LDR      r1,[r0,#0]
0000b6  4ad2              LDR      r2,|L1.1024|
0000b8  4011              ANDS     r1,r1,r2
0000ba  6001              STR      r1,[r0,#0]
;;;227    
;;;228      /* Reset HSEBYP bit */
;;;229      RCC->CR &= (uint32_t)0xFFFBFFFF;
0000bc  6801              LDR      r1,[r0,#0]
0000be  f4212180          BIC      r1,r1,#0x40000
0000c2  6001              STR      r1,[r0,#0]
;;;230    
;;;231      /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
;;;232      RCC->CFGR &= (uint32_t)0xFF80FFFF;
0000c4  6841              LDR      r1,[r0,#4]
0000c6  f42101fe          BIC      r1,r1,#0x7f0000
0000ca  6041              STR      r1,[r0,#4]
;;;233    
;;;234    #ifdef STM32F10X_CL
;;;235      /* Reset PLL2ON and PLL3ON bits */
;;;236      RCC->CR &= (uint32_t)0xEBFFFFFF;
;;;237    
;;;238      /* Disable all interrupts and clear pending bits  */
;;;239      RCC->CIR = 0x00FF0000;
;;;240    
;;;241      /* Reset CFGR2 register */
;;;242      RCC->CFGR2 = 0x00000000;
;;;243    #elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
;;;244      /* Disable all interrupts and clear pending bits  */
;;;245      RCC->CIR = 0x009F0000;
;;;246    
;;;247      /* Reset CFGR2 register */
;;;248      RCC->CFGR2 = 0x00000000;      
;;;249    #else
;;;250      /* Disable all interrupts and clear pending bits  */
;;;251      RCC->CIR = 0x009F0000;
0000cc  f44f011f          MOV      r1,#0x9f0000
0000d0  6081              STR      r1,[r0,#8]
0000d2  f7fffffe          BL       SetSysClockTo72
;;;252    #endif /* STM32F10X_CL */
;;;253        
;;;254    #if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
;;;255      #ifdef DATA_IN_ExtSRAM
;;;256        SystemInit_ExtMemCtl(); 
;;;257      #endif /* DATA_IN_ExtSRAM */
;;;258    #endif 
;;;259    
;;;260      /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
;;;261      /* Configure the Flash Latency cycles and enable prefetch buffer */
;;;262      SetSysClock();
;;;263    
;;;264    #ifdef VECT_TAB_SRAM
;;;265      SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
;;;266    #else
;;;267      SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
0000d6  49cb              LDR      r1,|L1.1028|
0000d8  f04f6000          MOV      r0,#0x8000000
0000dc  6008              STR      r0,[r1,#0]
;;;268    #endif 
;;;269    }
0000de  bd10              POP      {r4,pc}
;;;270    
                          ENDP

                  SystemCoreClockUpdate PROC
;;;305      */
;;;306    void SystemCoreClockUpdate (void)
0000e0  4ac4              LDR      r2,|L1.1012|
;;;307    {
0000e2  b510              PUSH     {r4,lr}
;;;308      uint32_t tmp = 0, pllmull = 0, pllsource = 0;
;;;309    
;;;310    #ifdef  STM32F10X_CL
;;;311      uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
;;;312    #endif /* STM32F10X_CL */
;;;313    
;;;314    #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
;;;315      uint32_t prediv1factor = 0;
;;;316    #endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */
;;;317        
;;;318      /* Get SYSCLK source -------------------------------------------------------*/
;;;319      tmp = RCC->CFGR & RCC_CFGR_SWS;
0000e4  6850              LDR      r0,[r2,#4]
;;;320      
;;;321      switch (tmp)
;;;322      {
;;;323        case 0x00:  /* HSI used as system clock */
;;;324          SystemCoreClock = HSI_VALUE;
0000e6  4bc8              LDR      r3,|L1.1032|
0000e8  f010010c          ANDS     r1,r0,#0xc            ;319
0000ec  48c7              LDR      r0,|L1.1036|
0000ee  d003              BEQ      |L1.248|
0000f0  2904              CMP      r1,#4                 ;321
0000f2  d001              BEQ      |L1.248|
0000f4  2908              CMP      r1,#8                 ;321
0000f6  d001              BEQ      |L1.252|
                  |L1.248|
;;;325          break;
0000f8  6083              STR      r3,[r0,#8]  ; SystemCoreClock
0000fa  e012              B        |L1.290|
                  |L1.252|
;;;326        case 0x04:  /* HSE used as system clock */
;;;327          SystemCoreClock = HSE_VALUE;
;;;328          break;
;;;329        case 0x08:  /* PLL used as system clock */
;;;330    
;;;331          /* Get PLL clock source and multiplication factor ----------------------*/
;;;332          pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
0000fc  6851              LDR      r1,[r2,#4]
;;;333          pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
0000fe  6853              LDR      r3,[r2,#4]
000100  f4011170          AND      r1,r1,#0x3c0000       ;332
;;;334          
;;;335    #ifndef STM32F10X_CL      
;;;336          pllmull = ( pllmull >> 18) + 2;
000104  f04f0402          MOV      r4,#2
000108  f4133f80          TST      r3,#0x10000           ;333
00010c  eb044191          ADD      r1,r4,r1,LSR #18
;;;337          
;;;338          if (pllsource == 0x00)
000110  d002              BEQ      |L1.280|
;;;339          {
;;;340            /* HSI oscillator clock divided by 2 selected as PLL clock entry */
;;;341            SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
;;;342          }
;;;343          else
;;;344          {
;;;345     #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
;;;346           prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
;;;347           /* HSE oscillator clock selected as PREDIV1 clock entry */
;;;348           SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 
;;;349     #else
;;;350            /* HSE selected as PLL clock entry */
;;;351            if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
000112  6853              LDR      r3,[r2,#4]
000114  039b              LSLS     r3,r3,#14
000116  d501              BPL      |L1.284|
                  |L1.280|
000118  4bbd              LDR      r3,|L1.1040|
00011a  e000              B        |L1.286|
                  |L1.284|
;;;352            {/* HSE oscillator clock divided by 2 */
;;;353              SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
;;;354            }
;;;355            else
;;;356            {
;;;357              SystemCoreClock = HSE_VALUE * pllmull;
00011c  4bba              LDR      r3,|L1.1032|
                  |L1.286|
00011e  4359              MULS     r1,r3,r1              ;353
000120  6081              STR      r1,[r0,#8]            ;353  ; SystemCoreClock
                  |L1.290|
;;;358            }
;;;359     #endif
;;;360          }
;;;361    #else
;;;362          pllmull = pllmull >> 18;
;;;363          
;;;364          if (pllmull != 0x0D)
;;;365          {
;;;366             pllmull += 2;
;;;367          }
;;;368          else
;;;369          { /* PLL multiplication factor = PLL input clock * 6.5 */
;;;370            pllmull = 13 / 2; 
;;;371          }
;;;372                
;;;373          if (pllsource == 0x00)
;;;374          {
;;;375            /* HSI oscillator clock divided by 2 selected as PLL clock entry */
;;;376            SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
;;;377          }
;;;378          else
;;;379          {/* PREDIV1 selected as PLL clock entry */
;;;380            
;;;381            /* Get PREDIV1 clock source and division factor */
;;;382            prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
;;;383            prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
;;;384            
;;;385            if (prediv1source == 0)
;;;386            { 
;;;387              /* HSE oscillator clock selected as PREDIV1 clock entry */
;;;388              SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;          
;;;389            }
;;;390            else
;;;391            {/* PLL2 clock selected as PREDIV1 clock entry */
;;;392              
;;;393              /* Get PREDIV2 division factor and PLL2 multiplication factor */
;;;394              prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1;
;;;395              pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; 
;;;396              SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;                         
;;;397            }
;;;398          }
;;;399    #endif /* STM32F10X_CL */ 
;;;400          break;
;;;401    
;;;402        default:
;;;403          SystemCoreClock = HSI_VALUE;
;;;404          break;
;;;405      }
;;;406      
;;;407      /* Compute HCLK clock frequency ----------------*/
;;;408      /* Get HCLK prescaler */
;;;409      tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
000122  6851              LDR      r1,[r2,#4]
000124  4ab9              LDR      r2,|L1.1036|
000126  f3c11103          UBFX     r1,r1,#4,#4
00012a  3250              ADDS     r2,r2,#0x50
00012c  5c51              LDRB     r1,[r2,r1]
;;;410      /* HCLK clock frequency */
;;;411      SystemCoreClock >>= tmp;  
00012e  6882              LDR      r2,[r0,#8]  ; SystemCoreClock
000130  40ca              LSRS     r2,r2,r1
000132  6082              STR      r2,[r0,#8]  ; SystemCoreClock
;;;412    }
000134  bd10              POP      {r4,pc}
;;;413    
                          ENDP

                  CalcStepX PROC
;;;61     */
;;;62     int CalcStepX(int pos){				//        POS.
000136  49b7              LDR      r1,|L1.1044|
;;;63     // ----------------------------------------------
;;;64     //printf("\r\n>w");
;;;65     	return((pos*ResolX*2/UnitX+1)/2);
000138  690a              LDR      r2,[r1,#0x10]  ; lcnfbuf
00013a  6949              LDR      r1,[r1,#0x14]  ; lcnfbuf
00013c  4342              MULS     r2,r0,r2
00013e  0050              LSLS     r0,r2,#1
000140  fb90f0f1          SDIV     r0,r0,r1
000144  1c40              ADDS     r0,r0,#1
000146  eb0070d0          ADD      r0,r0,r0,LSR #31
00014a  1040              ASRS     r0,r0,#1
;;;66     }
00014c  4770              BX       lr
;;;67     int CalcStepY(int pos){				//        POS.
                          ENDP

                  CalcStepY PROC
00014e  49b1              LDR      r1,|L1.1044|
;;;68     // ----------------------------------------------
;;;69     //printf("\r\n>w");
;;;70     	return((pos*ResolY*2/UnitY+1)/2);
000150  698a              LDR      r2,[r1,#0x18]  ; lcnfbuf
000152  69c9              LDR      r1,[r1,#0x1c]  ; lcnfbuf
000154  4342              MULS     r2,r0,r2
000156  0050              LSLS     r0,r2,#1
000158  fb90f0f1          SDIV     r0,r0,r1
00015c  1c40              ADDS     r0,r0,#1
00015e  eb0070d0          ADD      r0,r0,r0,LSR #31
000162  1040              ASRS     r0,r0,#1
;;;71     }
000164  4770              BX       lr
;;;72     static const MCUINFO tab_mcu={
                          ENDP

                  SER_Init1 PROC
;;;4      //_______________________________________________
;;;5      void SER_Init1 (void) {
000166  48ac              LDR      r0,|L1.1048|
;;;6      //-----------------------------------------------
;;;7        AFIO->MAPR &=~AFIO_MAPR_USART1_REMAP;		// clear USART1 remap (PA9, PA10)
000168  6841              LDR      r1,[r0,#4]
00016a  f0210104          BIC      r1,r1,#4
00016e  6041              STR      r1,[r0,#4]
;;;8      
;;;9        portRS1_CR &=~(GPIO_CRH_CNF10|GPIO_CRH_MODE10
000170  48aa              LDR      r0,|L1.1052|
000172  6801              LDR      r1,[r0,#0]
000174  f421617f          BIC      r1,r1,#0xff0
000178  6001              STR      r1,[r0,#0]
;;;10     		|GPIO_CRH_CNF9 |GPIO_CRH_MODE9 );// clear PA9, PA10
;;;11       
;;;12       set_IO_CR(portRS1,pinTx1,p_a_p50);		// USART1 Tx (PA9) output push-pull
00017a  6801              LDR      r1,[r0,#0]
00017c  f04101b0          ORR      r1,r1,#0xb0
000180  6001              STR      r1,[r0,#0]
;;;13       set_IO_CR(portRS1,pinRx1,p_i_f);		// USART1 Rx (PA10) input float
000182  6801              LDR      r1,[r0,#0]
000184  f4416180          ORR      r1,r1,#0x400
000188  6001              STR      r1,[r0,#0]
;;;14     
;;;15       RCC->APB2ENR |=  RCC_APB2ENR_USART1EN;	// enable USART1 clock
00018a  489a              LDR      r0,|L1.1012|
00018c  6981              LDR      r1,[r0,#0x18]
00018e  f4414180          ORR      r1,r1,#0x4000
000192  6181              STR      r1,[r0,#0x18]
;;;16     
;;;17       USART1->CR1   = USART_CR1_RE|USART_CR1_TE;//|USART_CR1_RXNEIE;	// enable RX, TX, IRQ
000194  48a2              LDR      r0,|L1.1056|
000196  210c              MOVS     r1,#0xc
000198  8001              STRH     r1,[r0,#0]
;;;18       USART1->CR2   = 0x0000;
00019a  2100              MOVS     r1,#0
00019c  1d02              ADDS     r2,r0,#4
00019e  8011              STRH     r1,[r2,#0]
;;;19       USART1->CR3   = 0x0000;			// no flow control
0001a0  1d12              ADDS     r2,r2,#4
0001a2  8011              STRH     r1,[r2,#0]
;;;20       USART1->BRR   = MCK/FREQ_RS1;			// baudrate
0001a4  214e              MOVS     r1,#0x4e
0001a6  1f02              SUBS     r2,r0,#4
0001a8  8011              STRH     r1,[r2,#0]
;;;21     
;;;22       USART1->CR1  |= USART_CR1_UE;			// Enable USART
0001aa  8801              LDRH     r1,[r0,#0]
0001ac  f4415100          ORR      r1,r1,#0x2000
0001b0  8001              STRH     r1,[r0,#0]
;;;23     }//______________________________________________
0001b2  4770              BX       lr
;;;24     __inline void SER_WriteChar(char c){
                          ENDP

                  SER_WaitTx PROC
;;;30     
;;;31     void SER_WaitTx (void) {
0001b4  489a              LDR      r0,|L1.1056|
;;;32     	while (!USART1->SR&USART_SR_TC);		//
0001b6  380c              SUBS     r0,r0,#0xc
0001b8  8800              LDRH     r0,[r0,#0]
;;;33     }//______________________________________________
0001ba  4770              BX       lr
;;;34     int SER_CheckCharRx (void) {
                          ENDP

                  SER_CheckCharRx PROC
0001bc  4898              LDR      r0,|L1.1056|
;;;35     	return ((USART1->SR & USART_SR_RXNE)>>5);
0001be  380c              SUBS     r0,r0,#0xc
0001c0  8800              LDRH     r0,[r0,#0]
0001c2  f3c01040          UBFX     r0,r0,#5,#1
;;;36     }//______________________________________________
0001c6  4770              BX       lr
;;;37     int SER_CheckCharTx (void) {
                          ENDP

                  SER_CheckCharTx PROC
0001c8  4895              LDR      r0,|L1.1056|
;;;38     	return ((USART1->SR & USART_SR_TXE)>>7);
0001ca  380c              SUBS     r0,r0,#0xc
0001cc  8800              LDRH     r0,[r0,#0]
0001ce  f3c010c0          UBFX     r0,r0,#7,#1
;;;39     }//______________________________________________
0001d2  4770              BX       lr
;;;40     char SER_PutChar (char c) {
                          ENDP

                  SER_PutChar PROC
0001d4  b500              PUSH     {lr}
0001d6  4601              MOV      r1,r0
                  |L1.472|
;;;41     
;;;42     	while (!(SER_CheckCharTx()));
0001d8  f7fffffe          BL       SER_CheckCharTx
0001dc  2800              CMP      r0,#0
0001de  d0fb              BEQ      |L1.472|
0001e0  488f              LDR      r0,|L1.1056|
0001e2  3808              SUBS     r0,r0,#8
0001e4  8001              STRH     r1,[r0,#0]
;;;43     	SER_WriteChar(c); return (c);
0001e6  4608              MOV      r0,r1
;;;44     }//______________________________________________
0001e8  bd00              POP      {pc}
;;;45     char SER_GetChar (void) {
                          ENDP

                  SER_GetChar PROC
0001ea  b500              PUSH     {lr}
                  |L1.492|
;;;46     
;;;47     	while (!(SER_CheckCharRx()));
0001ec  f7fffffe          BL       SER_CheckCharRx
0001f0  2800              CMP      r0,#0
0001f2  d0fb              BEQ      |L1.492|
0001f4  488a              LDR      r0,|L1.1056|
0001f6  3808              SUBS     r0,r0,#8
0001f8  8800              LDRH     r0,[r0,#0]
0001fa  b2c0              UXTB     r0,r0
;;;48     	return SER_ReadChar();
;;;49     }//______________________________________________
0001fc  bd00              POP      {pc}
;;;50     void WRITE_TO_COM(char *ptr,uint cnt){		//    COM .
                          ENDP

                  WRITE_TO_COM PROC
0001fe  b510              PUSH     {r4,lr}
000200  460c              MOV      r4,r1
000202  4603              MOV      r3,r0
;;;51     int i;
;;;52      for	(i=0; i<cnt; i++)			//    .
000204  2200              MOVS     r2,#0
000206  e003              B        |L1.528|
                  |L1.520|
;;;53      {
;;;54     	SER_PutChar(ptr[i]);			// 
000208  5c98              LDRB     r0,[r3,r2]
00020a  f7fffffe          BL       SER_PutChar
00020e  1c52              ADDS     r2,r2,#1              ;52
                  |L1.528|
000210  42a2              CMP      r2,r4                 ;52
000212  d3f9              BCC      |L1.520|
;;;55      }	 
;;;56     }//______________________________________________
000214  bd10              POP      {r4,pc}
;;;57     void READ_FROM_COM(uchar *ptr,uint cnt){	//    COM .
                          ENDP

                  READ_FROM_COM PROC
000216  b500              PUSH     {lr}
000218  4603              MOV      r3,r0
;;;58     uint i;
;;;59      for (i=0; i<cnt; i++)				//    .
00021a  2200              MOVS     r2,#0
00021c  e003              B        |L1.550|
                  |L1.542|
;;;60      {
;;;61     	ptr[i]=SER_GetChar();			//   .
00021e  f7fffffe          BL       SER_GetChar
000222  5498              STRB     r0,[r3,r2]
000224  1c52              ADDS     r2,r2,#1              ;59
                  |L1.550|
000226  428a              CMP      r2,r1                 ;59
000228  d3f9              BCC      |L1.542|
;;;62      }
;;;63     }//______________________________________________
00022a  bd00              POP      {pc}
;;;64     void SendBlock (uchar* ptr, uint len, uchar id){//     PTR,  LEN  ID. 
                          ENDP

                  SendBlock PROC
00022c  b570              PUSH     {r4-r6,lr}
00022e  4606              MOV      r6,r0
000230  460d              MOV      r5,r1
;;;65     // ----------------------------------------------
;;;66     uint kc, i, chr;
;;;67     //printf("\r\nsend ptr 0x%p len %d id %d",ptr,len,id);
;;;68     	SER_PutChar(CHARBEG);			// "B"
000232  20d6              MOVS     r0,#0xd6
000234  f7fffffe          BL       SER_PutChar
;;;69     	kc=CHARBEG+len+id+sizeof(RSHDR);
000238  18ab              ADDS     r3,r5,r2
00023a  33dc              ADDS     r3,r3,#0xdc
;;;70     	SER_PutChar(id);			// "B,ID,"
00023c  4610              MOV      r0,r2
00023e  f7fffffe          BL       SER_PutChar
;;;71      for (i=0; i<len; i++)
000242  2200              MOVS     r2,#0
000244  e005              B        |L1.594|
                  |L1.582|
;;;72      {
;;;73     	chr=ptr[i];
000246  5cb4              LDRB     r4,[r6,r2]
;;;74     	SER_PutChar(chr);			//
000248  4620              MOV      r0,r4
00024a  f7fffffe          BL       SER_PutChar
;;;75     	kc+=chr;
00024e  4423              ADD      r3,r3,r4
000250  1c52              ADDS     r2,r2,#1              ;71
                  |L1.594|
000252  42aa              CMP      r2,r5                 ;71
000254  d3f7              BCC      |L1.582|
;;;76      }
;;;77     //	SER_PutChar(((len+sizeof(RSHDR))^(kc>>8))&0xFF);	//
;;;78     	SER_PutChar(len+sizeof(RSHDR));		//
000256  1dad              ADDS     r5,r5,#6
000258  b2e8              UXTB     r0,r5
00025a  f7fffffe          BL       SER_PutChar
;;;79     	SER_PutChar(kc&0xFF);			//
00025e  b2d8              UXTB     r0,r3
000260  f7fffffe          BL       SER_PutChar
;;;80     	SER_PutChar(kc>>8);			//
000264  f3c32007          UBFX     r0,r3,#8,#8
000268  f7fffffe          BL       SER_PutChar
;;;81     	SER_PutChar(CHAREND);			//
00026c  e8bd4070          POP      {r4-r6,lr}
000270  20e7              MOVS     r0,#0xe7
000272  e7fe              B        SER_PutChar
;;;82     }//______________________________________________
;;;83     void ACK(){					// .
                          ENDP

                  ACK PROC
000274  2200              MOVS     r2,#0
;;;84     // ----------------------------------------------
;;;85     	SendBlock(RxBuf,0,CMD_ACK);		//   .
000276  4867              LDR      r0,|L1.1044|
000278  4611              MOV      r1,r2
00027a  3058              ADDS     r0,r0,#0x58
00027c  e7fe              B        SendBlock
;;;86     }//______________________________________________
;;;14     #include "src\retarget.c"
                          ENDP

                  fputc PROC
;;;31     
;;;32     int fputc(int c, FILE *f) {
00027e  b500              PUSH     {lr}
000280  4602              MOV      r2,r0
;;;33       if (c == '\n')  {
000282  280a              CMP      r0,#0xa
000284  d102              BNE      |L1.652|
;;;34         SER_PutChar('\r');
000286  200d              MOVS     r0,#0xd
000288  f7fffffe          BL       SER_PutChar
                  |L1.652|
;;;35       }
;;;36       return (SER_PutChar(c));
00028c  b2d0              UXTB     r0,r2
00028e  f85deb04          POP      {lr}
000292  e7fe              B        SER_PutChar
;;;37     }
;;;38     
                          ENDP

                  fgetc PROC
;;;39     
;;;40     int fgetc(FILE *f) {
000294  b500              PUSH     {lr}
;;;41       return (SER_PutChar(SER_GetChar()));
000296  f7fffffe          BL       SER_GetChar
00029a  f85deb04          POP      {lr}
00029e  e7fe              B        SER_PutChar
;;;42     }
;;;43     
                          ENDP

                  ferror PROC
;;;44     
;;;45     int ferror(FILE *f) {
0002a0  f04f30ff          MOV      r0,#0xffffffff
;;;46       /* Your implementation of ferror */
;;;47       return EOF;
;;;48     }
0002a4  4770              BX       lr
;;;49     
                          ENDP

                  _ttywrch PROC
;;;50     
;;;51     void _ttywrch(int c) {
0002a6  b2c0              UXTB     r0,r0
;;;52       SER_PutChar(c);
0002a8  e7fe              B        SER_PutChar
;;;53     }
;;;54     
                          ENDP

                  _sys_exit PROC
                  |L1.682|
;;;55     
;;;56     void _sys_exit(int return_code) {
0002aa  e7fe              B        |L1.682|
;;;57     label:  goto label;  /* endless loop */
;;;58     }
;;;15     #include "src\step.c"
                          ENDP

                  OutStepSign PROC
;;;15     
;;;16     void OutStepSign(uint pins){			//     .
0002ac  f00000f0          AND      r0,r0,#0xf0
;;;17     
;;;18     	pins&=mpinSTP;				//   .
;;;19     	pins=(pins|((pins^mpinSTP)<<16));	//       16 .
0002b0  f08001f0          EOR      r1,r0,#0xf0
0002b4  ea404001          ORR      r0,r0,r1,LSL #16
;;;20     	portSTP->BSRR=pins;			//    .
0002b8  4958              LDR      r1,|L1.1052|
0002ba  310c              ADDS     r1,r1,#0xc
0002bc  6008              STR      r0,[r1,#0]
;;;21     } // -------------------------------------------
0002be  4770              BX       lr
;;;22     void SetVoltageStep(int pos){			//     .
                          ENDP

                  SetVoltageStep PROC
0002c0  4958              LDR      r1,|L1.1060|
;;;23     
;;;24     	OutStepSign(StepTable[pos&7]);
0002c2  f0000007          AND      r0,r0,#7
0002c6  f8510020          LDR      r0,[r1,r0,LSL #2]
0002ca  e7fe              B        OutStepSign
;;;25     } // -------------------------------------------
;;;26     void OffVoltageStep(){				//  -   .
                          ENDP

                  OffVoltageStep PROC
0002cc  494f              LDR      r1,|L1.1036|
0002ce  6c08              LDR      r0,[r1,#0x40]  ; StepTOT
0002d0  2800              CMP      r0,#0
0002d2  d003              BEQ      |L1.732|
;;;27     uint	temp=StepTOT;
;;;28     
;;;29      if	(temp)					//
;;;30      {
;;;31     	temp--, StepTOT=temp;			//    -.
0002d4  1e40              SUBS     r0,r0,#1
;;;32       if	(!temp)					//   0-?
0002d6  6408              STR      r0,[r1,#0x40]  ; StepTOT
0002d8  d100              BNE      |L1.732|
;;;33       {
;;;34     	OutStepSign(0);				//  .
0002da  e7fe              B        OutStepSign
                  |L1.732|
;;;35       }	
;;;36      }
;;;37     } // -------------------------------------------
0002dc  4770              BX       lr
;;;38     void StepBreak(){				//  .
                          ENDP

                  StepBreak PROC
0002de  4a4b              LDR      r2,|L1.1036|
;;;39     // ---------------------------------------------
;;;40     uint temp=0;
;;;41     SysTick_Type* ptr=SysTick;
;;;42     
;;;43     	DirY=temp; StateY=0;			//   .
0002e0  4b52              LDR      r3,|L1.1068|
0002e2  2100              MOVS     r1,#0
0002e4  70d1              STRB     r1,[r2,#3]
;;;44     	StepCNT=temp;				//  =0.
0002e6  f8c31184          STR      r1,[r3,#0x184]  ; lbufinfo
;;;45     	temp=STOT; StepTOT=temp;		//  .
0002ea  6451              STR      r1,[r2,#0x44]  ; StepCNT
0002ec  484e              LDR      r0,|L1.1064|
0002ee  f64261e0          MOV      r1,#0x2ee0
;;;46     	temp=FT_STEP/FT_OUT-1;			//    -.
0002f2  6411              STR      r1,[r2,#0x40]  ; StepTOT
0002f4  f648419f          MOV      r1,#0x8c9f
;;;47     	ptr->LOAD=temp;	ptr->VAL=16;		//     ( 16 ).
0002f8  6041              STR      r1,[r0,#4]
0002fa  2110              MOVS     r1,#0x10
0002fc  6081              STR      r1,[r0,#8]
;;;48     } // -------------------------------------------
0002fe  4770              BX       lr
;;;49     void AccelStep (int speed){			//   (speed- ).
                          ENDP

                  AccelStep PROC
000300  4a42              LDR      r2,|L1.1036|
;;;50     // ---------------------------------------------
;;;51     uint temp=AccelPos;				//    .
;;;52     //SER_PutChar ('+');
;;;53     if (temp<(sizeof(AccelTable)/sizeof(AccelTable[0])))
000302  6b51              LDR      r1,[r2,#0x34]  ; AccelPos
000304  29ee              CMP      r1,#0xee
000306  d20b              BCS      |L1.800|
;;;54      {
;;;55     	temp++; AccelPos=temp;			//    .
;;;56     	temp=AccelTable[temp];
000308  4b46              LDR      r3,|L1.1060|
00030a  1c49              ADDS     r1,r1,#1              ;55
00030c  3320              ADDS     r3,r3,#0x20
00030e  6351              STR      r1,[r2,#0x34]  ; AccelPos
000310  f8531021          LDR      r1,[r3,r1,LSL #2]
;;;57      if (temp<=speed) cSpeedY=speed;		// cSpeedY=SpeedY;   .
000314  4281              CMP      r1,r0
000316  d801              BHI      |L1.796|
000318  63d0              STR      r0,[r2,#0x3c]  ; cSpeedY
;;;58      else	cSpeedY=temp;
;;;59      }
;;;60     else  rSpeedY=cSpeedY;				// 
;;;61     } // -------------------------------------------
00031a  4770              BX       lr
                  |L1.796|
00031c  63d1              STR      r1,[r2,#0x3c]         ;58  ; cSpeedY
00031e  4770              BX       lr
                  |L1.800|
000320  6bd0              LDR      r0,[r2,#0x3c]         ;60  ; cSpeedY
000322  6390              STR      r0,[r2,#0x38]         ;60  ; rSpeedY
000324  4770              BX       lr
;;;62     void DeccelStep(int speed){			//  .
                          ENDP

                  DeccelStep PROC
000326  4a39              LDR      r2,|L1.1036|
000328  6b51              LDR      r1,[r2,#0x34]  ; AccelPos
00032a  b159              CBZ      r1,|L1.836|
;;;63     // ----------------------------------------------	
;;;64     uint temp=AccelPos;				//    .
;;;65     //SER_PutChar ('-');
;;;66     if (temp>0)
;;;67      {
;;;68     	temp--; AccelPos=temp;			//    .
;;;69     	temp=AccelTable[temp];
00032c  4b3d              LDR      r3,|L1.1060|
00032e  1e49              SUBS     r1,r1,#1              ;68
000330  3320              ADDS     r3,r3,#0x20
000332  6351              STR      r1,[r2,#0x34]  ; AccelPos
000334  f8531021          LDR      r1,[r3,r1,LSL #2]
;;;70      if (temp>=speed) cSpeedY=speed;		// cSpeedY=SpeedY;   .
000338  4281              CMP      r1,r0
00033a  d301              BCC      |L1.832|
00033c  63d0              STR      r0,[r2,#0x3c]  ; cSpeedY
;;;71      else	cSpeedY=temp;
;;;72      }
;;;73     else
;;;74      {
;;;75     	rSpeedY=cSpeedY; StepBreak();
;;;76      }		//
;;;77     } // -------------------------------------------
00033e  4770              BX       lr
                  |L1.832|
000340  63d1              STR      r1,[r2,#0x3c]         ;71  ; cSpeedY
000342  4770              BX       lr
                  |L1.836|
000344  6bd0              LDR      r0,[r2,#0x3c]         ;75  ; cSpeedY
000346  6390              STR      r0,[r2,#0x38]         ;75  ; rSpeedY
000348  e7fe              B        StepBreak
;;;78     void ChangePosStep(schar dir){			//      .
                          ENDP

                  ChangePosStep PROC
00034a  b570              PUSH     {r4-r6,lr}
;;;79     // ----------------------------------------------
;;;80     int temp, temp1;
;;;81     //SER_PutChar ('*');
;;;82     	DirY=dir;				//  .
00034c  4e2f              LDR      r6,|L1.1036|
;;;83     	temp1=CurrStepPos;			//   .
00034e  4a31              LDR      r2,|L1.1044|
000350  70f0              STRB     r0,[r6,#3]            ;82
000352  3a10              SUBS     r2,r2,#0x10
;;;84     	temp=StepCNT;				//     .
;;;85     if (temp<=AccelPos) rSpeedY=BREAKSPEED;		//   ,      .
000354  6b73              LDR      r3,[r6,#0x34]  ; AccelPos
000356  6c71              LDR      r1,[r6,#0x44]  ; StepCNT
000358  6854              LDR      r4,[r2,#4]            ;84  ; lbufinfo
00035a  4299              CMP      r1,r3
00035c  d801              BHI      |L1.866|
00035e  4b34              LDR      r3,|L1.1072|
000360  63b3              STR      r3,[r6,#0x38]  ; rSpeedY
                  |L1.866|
;;;86     if (!temp) StepBreak();				//    .
000362  b1f1              CBZ      r1,|L1.930|
;;;87     else
;;;88      {
;;;89     	StateY=1;				//   .
000364  4d33              LDR      r5,|L1.1076|
000366  2301              MOVS     r3,#1
;;;90     	temp1+=dir; CurrStepPos=temp1;		//  .
000368  4420              ADD      r0,r0,r4
00036a  f8c53184          STR      r3,[r5,#0x184]  ; lbufinfo
;;;91     	temp--; StepCNT=temp;			//   .
00036e  1e49              SUBS     r1,r1,#1
000370  6050              STR      r0,[r2,#4]  ; lbufinfo
;;;92     	SetVoltageStep(temp1);			//    .
000372  6471              STR      r1,[r6,#0x44]  ; StepCNT
000374  f7fffffe          BL       SetVoltageStep
;;;93     	StepOn; fStep=1;			//    Step.
000378  482f              LDR      r0,|L1.1080|
00037a  6003              STR      r3,[r0,#0]
00037c  7133              STRB     r3,[r6,#4]
00037e  e9d6450e          LDRD     r4,r5,[r6,#0x38]
;;;94     
;;;95     	temp=rSpeedY; temp1=cSpeedY;		//   .
;;;96      if (temp1<temp) DeccelStep(temp);		//   ( ).
000382  42a5              CMP      r5,r4
000384  da02              BGE      |L1.908|
000386  4620              MOV      r0,r4
000388  f7fffffe          BL       DeccelStep
                  |L1.908|
;;;97      if (temp1>temp) AccelStep(temp);		//   ( ).
00038c  42a5              CMP      r5,r4
00038e  dd02              BLE      |L1.918|
000390  4620              MOV      r0,r4
000392  f7fffffe          BL       AccelStep
                  |L1.918|
;;;98     	SysTick->LOAD=(cSpeedY>>1);		//  /2    STEP.
000396  6bf0              LDR      r0,[r6,#0x3c]  ; cSpeedY
000398  f04f21e0          MOV      r1,#0xe000e000
00039c  1040              ASRS     r0,r0,#1
00039e  6148              STR      r0,[r1,#0x14]
;;;99      }
;;;100    //intf("\r\ncp %d ps %d cs %d sp %d ap %d",CurrStepPos,StepPos,cSpeedY,SpeedY,AccelPos);
;;;101    } // --------------------------------------------
0003a0  bd70              POP      {r4-r6,pc}
                  |L1.930|
0003a2  e8bd4070          POP      {r4-r6,lr}            ;86
0003a6  e7fe              B        StepBreak
;;;102    void WaitSteps(){				//    .
                          ENDP

                  WaitSteps PROC
0003a8  4818              LDR      r0,|L1.1036|
;;;103    // ----------------------------------------------
;;;104    while	(!StepCNT);
0003aa  6c40              LDR      r0,[r0,#0x44]
                  |L1.940|
0003ac  2800              CMP      r0,#0
0003ae  d0fd              BEQ      |L1.940|
;;;105    } // --------------------------------------------
0003b0  4770              BX       lr
;;;106    void Steps(int rpos){				// .
                          ENDP

                  Steps PROC
0003b2  b410              PUSH     {r4}
;;;107    // ----------------------------------------------
;;;108    uint tmp;
;;;109    	rSpeedY=BREAKSPEED;
0003b4  4c15              LDR      r4,|L1.1036|
0003b6  491e              LDR      r1,|L1.1072|
0003b8  2800              CMP      r0,#0                 ;106
0003ba  63a1              STR      r1,[r4,#0x38]         ;106  ; rSpeedY
0003bc  d04a              BEQ      |L1.1108|
;;;110     if (rpos) 					//   ,  0.
;;;111     {
;;;112      if (!DirY)					// ?
0003be  78e1              LDRB     r1,[r4,#3]  ; DirY
0003c0  2900              CMP      r1,#0
0003c2  d147              BNE      |L1.1108|
;;;113      {
;;;114    	AccelPos=0; cSpeedY=AccelTable[0];	//    .
0003c4  4b1d              LDR      r3,|L1.1084|
;;;115    	tmp=StpSpd;
0003c6  63e3              STR      r3,[r4,#0x3c]  ; cSpeedY
0003c8  6361              STR      r1,[r4,#0x34]  ; AccelPos
0003ca  4912              LDR      r1,|L1.1044|
;;;116       if (!tmp) tmp=1;				//     0.
0003cc  6a4a              LDR      r2,[r1,#0x24]  ; lcnfbuf
0003ce  b902              CBNZ     r2,|L1.978|
0003d0  2201              MOVS     r2,#1
                  |L1.978|
;;;117    	tmp=(FT_STEP/tmp-1);			//    .
0003d2  491b              LDR      r1,|L1.1088|
0003d4  fbb1f1f2          UDIV     r1,r1,r2
0003d8  1e49              SUBS     r1,r1,#1
;;;118       if (tmp>cSpeedY) tmp=cSpeedY;		//   .
0003da  4299              CMP      r1,r3
0003dc  d900              BLS      |L1.992|
0003de  4619              MOV      r1,r3
                  |L1.992|
;;;119    	rSpeedY=tmp;				//   .
;;;120       if (rpos>0)
;;;121       {
;;;122    	DirOff; StepCNT=+rpos; ChangePosStep(+1);
0003e0  63a1              STR      r1,[r4,#0x38]  ; rSpeedY
0003e2  2102              MOVS     r1,#2
0003e4  2800              CMP      r0,#0                 ;120
0003e6  dd2d              BLE      |L1.1092|
0003e8  4a13              LDR      r2,|L1.1080|
0003ea  1d12              ADDS     r2,r2,#4
0003ec  6011              STR      r1,[r2,#0]
0003ee  6460              STR      r0,[r4,#0x44]  ; StepCNT
0003f0  2001              MOVS     r0,#1
0003f2  e02d              B        |L1.1104|
                  |L1.1012|
                          DCD      0x40021000
                  |L1.1016|
                          DCD      0x40022000
                  |L1.1020|
                          DCD      0xf8ff0000
                  |L1.1024|
                          DCD      0xfef6ffff
                  |L1.1028|
                          DCD      0xe000ed08
                  |L1.1032|
                          DCD      0x007a1200
                  |L1.1036|
                          DCD      ||.data||
                  |L1.1040|
                          DCD      0x003d0900
                  |L1.1044|
                          DCD      ||.bss||+0x10
                  |L1.1048|
                          DCD      0x40010000
                  |L1.1052|
                          DCD      0x40010804
                  |L1.1056|
                          DCD      0x4001380c
                  |L1.1060|
                          DCD      ||.constdata||+0x10
                  |L1.1064|
                          DCD      0xe000e010
                  |L1.1068|
                          DCD      ||.ARM.alias.lbufinfo||
                  |L1.1072|
                          DCD      0x0003f3af
                  |L1.1076|
                          DCD      ||.ARM.alias.lbufinfo||
                  |L1.1080|
                          DCD      0x40010c10
                  |L1.1084|
                          DCD      0x0003ec75
                  |L1.1088|
                          DCD      0x044aa200
                  |L1.1092|
;;;123       }
;;;124       else
;;;125       {
;;;126    	DirOn; StepCNT=-rpos; ChangePosStep(-1);
000444  4af8              LDR      r2,|L1.2088|
000446  6011              STR      r1,[r2,#0]
000448  4240              RSBS     r0,r0,#0
00044a  6460              STR      r0,[r4,#0x44]  ; StepCNT
00044c  f04f30ff          MOV      r0,#0xffffffff
                  |L1.1104|
000450  bc10              POP      {r4}
000452  e7fe              B        ChangePosStep
                  |L1.1108|
;;;127       }
;;;128      }
;;;129     }	 
;;;130    } // --------------------------------------------
000454  bc10              POP      {r4}
000456  4770              BX       lr
;;;131    void wSteps(int rpos){				//   .
                          ENDP

                  wSteps PROC
000458  49f4              LDR      r1,|L1.2092|
00045a  6c49              LDR      r1,[r1,#0x44]
                  |L1.1116|
00045c  2900              CMP      r1,#0
00045e  d0fd              BEQ      |L1.1116|
;;;132    // ----------------------------------------------
;;;133    	WaitSteps(); Steps(rpos);
000460  e7fe              B        Steps
;;;134    } // --------------------------------------------
;;;135    
                          ENDP

                  InitTimerSteps PROC
;;;136    void InitTimerSteps (){				//    .
000462  49f2              LDR      r1,|L1.2092|
000464  b510              PUSH     {r4,lr}
;;;137    // ----------------------------------------------
;;;138    	cSpeedY=BREAKSPEED;			//   = .
000466  48f2              LDR      r0,|L1.2096|
;;;139    	StepBreak();				// -   .
000468  63c8              STR      r0,[r1,#0x3c]  ; cSpeedY
00046a  f7fffffe          BL       StepBreak
;;;140    	NVIC_SetPriority (SysTick_IRQn,PriorSTP);//  .
00046e  2106              MOVS     r1,#6
000470  1fc8              SUBS     r0,r1,#7
000472  f7fffffe          BL       NVIC_SetPriority
;;;141    	SysTick->CTRL=SysTick_CTRL_TICKINT_Msk|	//  .
000476  f04f21e0          MOV      r1,#0xe000e000
00047a  2007              MOVS     r0,#7
00047c  6108              STR      r0,[r1,#0x10]
;;;142    		SysTick_CTRL_CLKSOURCE_Msk |	//    (72 ).
;;;143    		SysTick_CTRL_ENABLE_Msk;	//  .
;;;144    } // -------------------------------------------
00047e  bd10              POP      {r4,pc}
;;;145    void InitPinsSteps (){				//     .
                          ENDP

                  InitPinsSteps PROC
000480  48ec              LDR      r0,|L1.2100|
;;;146    
;;;147    	portSTP_CR &=~(
000482  6801              LDR      r1,[r0,#0]
000484  b289              UXTH     r1,r1
000486  6001              STR      r1,[r0,#0]
;;;148    		(PinCR(pinSTP0,GPIOCR))|	//    .
;;;149    		(PinCR(pinSTP1,GPIOCR))|
;;;150    		(PinCR(pinSTP2,GPIOCR))|
;;;151    		(PinCR(pinSTP3,GPIOCR))
;;;152    		);
;;;153    	portSTP_CR |=(
000488  6801              LDR      r1,[r0,#0]
00048a  4aeb              LDR      r2,|L1.2104|
00048c  4311              ORRS     r1,r1,r2
00048e  6001              STR      r1,[r0,#0]
;;;154    		(PinCR(pinSTP0,p_o_p10))|
;;;155    		(PinCR(pinSTP1,p_o_p10))|
;;;156    		(PinCR(pinSTP2,p_o_p10))|
;;;157    		(PinCR(pinSTP3,p_o_p10))
;;;158    		);
;;;159    	portSTPDIR_CR &=~(
000490  48e5              LDR      r0,|L1.2088|
000492  3810              SUBS     r0,r0,#0x10
000494  6801              LDR      r1,[r0,#0]
000496  f02101ff          BIC      r1,r1,#0xff
00049a  6001              STR      r1,[r0,#0]
;;;160    		(PinCR(pinSTEP,GPIOCR))|
;;;161    		(PinCR(pinDIR ,GPIOCR))
;;;162    		);
;;;163    	portSTPDIR_CR |=(
00049c  6801              LDR      r1,[r0,#0]
00049e  f0410111          ORR      r1,r1,#0x11
0004a2  6001              STR      r1,[r0,#0]
;;;164    		(PinCR(pinSTEP,p_o_p10))|	//   .
;;;165    		(PinCR(pinDIR ,p_o_p10))
;;;166    		);
;;;167    	SetVoltageStep(0);			// 
0004a4  2000              MOVS     r0,#0
0004a6  e7fe              B        SetVoltageStep
;;;168    } // -------------------------------------------
;;;169    
                          ENDP

                  SysTick_Handler PROC
;;;170    void TSTP_IRQ(){				//    .
0004a8  48e0              LDR      r0,|L1.2092|
;;;171    // ----------------------------------------------
;;;172    schar dir;
;;;173     if (fStep) 					// 
0004aa  7901              LDRB     r1,[r0,#4]  ; fStep
0004ac  b131              CBZ      r1,|L1.1212|
;;;174     {
;;;175    	fStep=0; StepOff;			//   STEP.
0004ae  2100              MOVS     r1,#0
0004b0  7101              STRB     r1,[r0,#4]
0004b2  49dd              LDR      r1,|L1.2088|
0004b4  2001              MOVS     r0,#1
0004b6  1d09              ADDS     r1,r1,#4
0004b8  6008              STR      r0,[r1,#0]
;;;176     }
;;;177     else
;;;178     {
;;;179    	dir=DirY;
;;;180      if (dir)	ChangePosStep(dir);		//  ,  .
;;;181      else		OffVoltageStep();		//   (  -).
;;;182     }
;;;183    }// ---------------------------------------------
0004ba  4770              BX       lr
                  |L1.1212|
0004bc  f9900003          LDRSB    r0,[r0,#3]            ;179  ; DirY
0004c0  b100              CBZ      r0,|L1.1220|
0004c2  e7fe              B        ChangePosStep
                  |L1.1220|
0004c4  e7fe              B        OffVoltageStep
;;;184    
                          ENDP

                  EX_CMD_STY PROC
;;;185    void EX_CMD_STY(uint prm, puint ptr, uint len){	//    .
0004c6  b500              PUSH     {lr}
;;;186    // ----------------------------------------------
;;;187    	Steps((int)prm);		ACK();	//   .
0004c8  f7fffffe          BL       Steps
0004cc  f85deb04          POP      {lr}
0004d0  e7fe              B        ACK
;;;188    } // --------------------------------------------
;;;189    void EX_CMD_MVY(uint prm, puint ptr, uint len){	//    .
                          ENDP

                  EX_CMD_MVY PROC
0004d2  b500              PUSH     {lr}
;;;190    // ----------------------------------------------
;;;191    	Steps(CalcStepY((int)prm)-CurrStepPos);	//
0004d4  f7fffffe          BL       CalcStepY
0004d8  49d8              LDR      r1,|L1.2108|
0004da  6849              LDR      r1,[r1,#4]  ; lbufinfo
0004dc  1a40              SUBS     r0,r0,r1
0004de  f7fffffe          BL       Steps
;;;192    	ACK();
0004e2  f85deb04          POP      {lr}
0004e6  e7fe              B        ACK
;;;193    } // --------------------------------------------
;;;194    void EX_CMD_SPY(uint prm, puint ptr, uint len){	//   .
                          ENDP

                  EX_CMD_SPY PROC
0004e8  49d4              LDR      r1,|L1.2108|
;;;195    // ----------------------------------------------
;;;196    	StpSpd=(int)prm;		ACK();
0004ea  3110              ADDS     r1,r1,#0x10
0004ec  6248              STR      r0,[r1,#0x24]  ; lcnfbuf
0004ee  e7fe              B        ACK
;;;197    } // --------------------------------------------
;;;198    void EX_CMD_AXSY (uint prm, puint ptr, uint len){//   .
                          ENDP

                  EX_CMD_AXSY PROC
0004f0  b500              PUSH     {lr}
;;;199    // ----------------------------------------------	
;;;200    	CurrStepPos=CalcStepY((int)prm); ACK();
0004f2  f7fffffe          BL       CalcStepY
0004f6  49d1              LDR      r1,|L1.2108|
0004f8  6048              STR      r0,[r1,#4]  ; lbufinfo
0004fa  f85deb04          POP      {lr}
0004fe  e7fe              B        ACK
;;;201    } // --------------------------------------------
;;;202    
                          ENDP

                  PWM_Set PROC
;;;1      
;;;2      void PWM_Set(ushort val){			//   .
000500  4aca              LDR      r2,|L1.2092|
;;;3      // ----------------------------------------------	
;;;4      schar dir;
;;;5      TIM_TypeDef *timptr=TPWM;
000502  49cf              LDR      r1,|L1.2112|
;;;6      
;;;7      	dir=DirX;
;;;8      	timptr->mPWMF=0; timptr->mPWMB=0;	//   .
000504  2300              MOVS     r3,#0
000506  f9922000          LDRSB    r2,[r2,#0]            ;7  ; DirX
00050a  870b              STRH     r3,[r1,#0x38]
00050c  868b              STRH     r3,[r1,#0x34]
;;;9        if (dir>0) timptr->mPWMF=val;
00050e  2a00              CMP      r2,#0
000510  dd01              BLE      |L1.1302|
000512  8708              STRH     r0,[r1,#0x38]
                  |L1.1300|
;;;10       if (dir<0) timptr->mPWMB=val;
;;;11     } // --------------------------------------------
000514  4770              BX       lr
                  |L1.1302|
000516  dafd              BGE      |L1.1300|
000518  8688              STRH     r0,[r1,#0x34]         ;10
00051a  4770              BX       lr
;;;12     void SetDirDC (int dir){			//   .
                          ENDP

                  SetDirDC PROC
00051c  4ac2              LDR      r2,|L1.2088|
;;;13     // ----------------------------------------------
;;;14     	portDC->BRR=(1<<pinPWRF|1<<pinPWRB);	//   .
00051e  f44f4110          MOV      r1,#0x9000
000522  1d12              ADDS     r2,r2,#4
000524  6011              STR      r1,[r2,#0]
;;;15      if (dir>0)	portDC->BSRR=1<<pinPWRF;	//   .
000526  1f11              SUBS     r1,r2,#4
000528  2800              CMP      r0,#0
00052a  dd02              BLE      |L1.1330|
00052c  f44f5080          MOV      r0,#0x1000
000530  e002              B        |L1.1336|
                  |L1.1330|
;;;16      if (dir<0)	portDC->BSRR=1<<pinPWRB;	//   .
000532  da02              BGE      |L1.1338|
000534  f44f4000          MOV      r0,#0x8000
                  |L1.1336|
000538  6008              STR      r0,[r1,#0]
                  |L1.1338|
;;;17     } // --------------------------------------------
00053a  4770              BX       lr
;;;18     void Init_TIM_PWM(){				//    TIM1.
                          ENDP

                  Init_TIM_PWM PROC
00053c  49c1              LDR      r1,|L1.2116|
;;;19     // ----------------------------------------------
;;;20     TIM_TypeDef *timptr=TPWM;
00053e  48c0              LDR      r0,|L1.2112|
;;;21     
;;;22     	SET_PER_PWM				//  .
000540  684a              LDR      r2,[r1,#4]
000542  f02202c0          BIC      r2,r2,#0xc0
000546  604a              STR      r2,[r1,#4]
000548  684a              LDR      r2,[r1,#4]
00054a  604a              STR      r2,[r1,#4]
00054c  49be              LDR      r1,|L1.2120|
00054e  698a              LDR      r2,[r1,#0x18]
000550  f4426200          ORR      r2,r2,#0x800
000554  618a              STR      r2,[r1,#0x18]
;;;23     	portDC_CR &=~(				//   .
000556  49b4              LDR      r1,|L1.2088|
000558  390c              SUBS     r1,r1,#0xc
00055a  680a              LDR      r2,[r1,#0]
00055c  b292              UXTH     r2,r2
00055e  600a              STR      r2,[r1,#0]
;;;24     		(PinCR(pinPWM,GPIOCR))|
;;;25     		(PinCR(pinPWMN,GPIOCR))|
;;;26     		(PinCR(pinPWRF,GPIOCR))|
;;;27     		(PinCR(pinPWRB,GPIOCR))
;;;28     		);
;;;29     	portDC_CR |=(
000560  680a              LDR      r2,[r1,#0]
000562  4bba              LDR      r3,|L1.2124|
000564  431a              ORRS     r2,r2,r3
000566  600a              STR      r2,[r1,#0]
;;;30     		(PinCR(pinPWM,p_a_p50))|	//  .
;;;31     		(PinCR(pinPWMN,p_a_p50))|	//  .
;;;32     		(PinCR(pinPWRF,p_o_p50))|	// GPIO.
;;;33     		(PinCR(pinPWRB,p_o_p50))	// GPIO.
;;;34     		);
;;;35     	timptr->PSC  = ((TPWM_CK/PWM_FREQ/PWM_RES)-1);	// set prescaler
000568  210d              MOVS     r1,#0xd
00056a  8501              STRH     r1,[r0,#0x28]
;;;36     	timptr->ARR  = (PWM_RES-1);		// set auto-reload
00056c  21ff              MOVS     r1,#0xff
00056e  8581              STRH     r1,[r0,#0x2c]
;;;37     	
;;;38     	timptr->CCMR1=
000570  f2460160          MOV      r1,#0x6060
000574  8301              STRH     r1,[r0,#0x18]
;;;39     		TIM_CCMR1_OC2M_1|
;;;40     		TIM_CCMR1_OC2M_2|
;;;41     		TIM_CCMR1_OC1M_1|
;;;42     		TIM_CCMR1_OC1M_2;		// PWM mode 6. Channel 1&2
;;;43     
;;;44     	timptr->CCER =	TIM_CCER_CC1NE|		//  .     1  8
000576  2144              MOVS     r1,#0x44
000578  8401              STRH     r1,[r0,#0x20]
;;;45     			TIM_CCER_CC2NE;
;;;46     	timptr->BDTR =	TIM_BDTR_MOE;
00057a  f44f4100          MOV      r1,#0x8000
00057e  f8a01044          STRH     r1,[r0,#0x44]
;;;47     			
;;;48     //			TIM_CCER_CC1NP|		// .
;;;49     //			TIM_CCER_CC2NP;
;;;50     
;;;51     	timptr->CR1 |= TIM_CR1_CEN;		//  .
000582  8801              LDRH     r1,[r0,#0]
000584  f0410101          ORR      r1,r1,#1
000588  8001              STRH     r1,[r0,#0]
;;;52     } // --------------------------------------------
00058a  4770              BX       lr
;;;53     void Init_TIM_TOT(){				//    .
                          ENDP

                  Init_TIM_TOT PROC
00058c  49ae              LDR      r1,|L1.2120|
00058e  b510              PUSH     {r4,lr}
;;;54     // ----------------------------------------------	
;;;55     TIM_TypeDef *timptr=TTOT;
000590  48af              LDR      r0,|L1.2128|
;;;56     	SET_PER_TOT				//  . 
000592  69ca              LDR      r2,[r1,#0x1c]
000594  f0420202          ORR      r2,r2,#2
000598  61ca              STR      r2,[r1,#0x1c]
;;;57     
;;;58     	timptr->PSC  = TTOT_CK/10000 - 1;	//   100  (10KHz).
00059a  f641411f          MOV      r1,#0x1c1f
00059e  8501              STRH     r1,[r0,#0x28]
;;;59     	timptr->ARR  = TOT_TIME*10-1;		//   .
0005a0  f242710f          MOV      r1,#0x270f
0005a4  8581              STRH     r1,[r0,#0x2c]
;;;60     
;;;61     	timptr->DIER =TIM_DIER_UIE;		//     .
0005a6  2101              MOVS     r1,#1
0005a8  8181              STRH     r1,[r0,#0xc]
;;;62     	NVIC_SetPriority (TTOT_IRQn,PriorTOT); 	//  .
0005aa  2108              MOVS     r1,#8
0005ac  201d              MOVS     r0,#0x1d
0005ae  f7fffffe          BL       NVIC_SetPriority
;;;63     	NVIC_EnableIRQ(TTOT_IRQn);		//    TIM2.
0005b2  e8bd4010          POP      {r4,lr}
0005b6  201d              MOVS     r0,#0x1d
0005b8  f7ffbffe          B.W      NVIC_EnableIRQ
;;;64     } // -------------------------------------------
;;;65     
                          ENDP

                  SetTOT PROC
;;;66     void SetTOT(uint tot){				//   -.
0005bc  49a4              LDR      r1,|L1.2128|
;;;67     // ----------------------------------------------	
;;;68     TIM_TypeDef *timptr=TTOT;
;;;69     	timptr->CNT =0;				//   0-.
0005be  2200              MOVS     r2,#0
0005c0  848a              STRH     r2,[r1,#0x24]
;;;70     	timptr->ARR =tot;			//  .
0005c2  8588              STRH     r0,[r1,#0x2c]
;;;71     	timptr->CR1 |=TIM_CR1_CEN;		//  .
0005c4  8808              LDRH     r0,[r1,#0]
0005c6  f0400001          ORR      r0,r0,#1
0005ca  8008              STRH     r0,[r1,#0]
;;;72     } // -------------------------------------------
0005cc  4770              BX       lr
;;;73     void ResetTOT(){				//  -.
                          ENDP

                  ResetTOT PROC
0005ce  48a0              LDR      r0,|L1.2128|
;;;74     // ----------------------------------------------	
;;;75     TIM_TypeDef *timptr=TTOT;
;;;76     	timptr->CR1 &=~TIM_CR1_CEN;		//  .
0005d0  8801              LDRH     r1,[r0,#0]
0005d2  f0210101          BIC      r1,r1,#1
0005d6  8001              STRH     r1,[r0,#0]
;;;77     } // -------------------------------------------
0005d8  4770              BX       lr
;;;78     void MotorBreak(){				//  .
                          ENDP

                  MotorBreak PROC
0005da  b510              PUSH     {r4,lr}
;;;79     
;;;80     	SetDirDC(0);				//  .
0005dc  2000              MOVS     r0,#0
0005de  f7fffffe          BL       SetDirDC
;;;81     	TCAP->DIER&=~TIM_DIER_UIE;		//     .
0005e2  489c              LDR      r0,|L1.2132|
0005e4  8801              LDRH     r1,[r0,#0]
0005e6  f0210101          BIC      r1,r1,#1
0005ea  8001              STRH     r1,[r0,#0]
;;;82     	VoltageMotor=0; SpeedMotor=0;		//   .
0005ec  4893              LDR      r0,|L1.2108|
0005ee  2400              MOVS     r4,#0
0005f0  3050              ADDS     r0,r0,#0x50
0005f2  7004              STRB     r4,[r0,#0]
0005f4  488d              LDR      r0,|L1.2092|
0005f6  6144              STR      r4,[r0,#0x14]  ; SpeedMotor
;;;83     	PWM_Set(0);				//  .
0005f8  4620              MOV      r0,r4
0005fa  f7fffffe          BL       PWM_Set
;;;84     	ResetTOT();				//   .
0005fe  f7fffffe          BL       ResetTOT
;;;85     	StateX=0;				//   .
000602  4895              LDR      r0,|L1.2136|
000604  f8c04180          STR      r4,[r0,#0x180]  ; lbufinfo
;;;86     } // --------------------------------------------
000608  bd10              POP      {r4,pc}
;;;87     void TTOT_IRQ(){				//     R  .
                          ENDP

                  TIM3_IRQHandler PROC
00060a  b530              PUSH     {r4,r5,lr}
;;;88     //**********************************************
;;;89     TIM_TypeDef *timptr=TTOT;
00060c  4c90              LDR      r4,|L1.2128|
;;;90     
;;;91     	timptr->SR =0;				//   .
00060e  2500              MOVS     r5,#0
000610  8225              STRH     r5,[r4,#0x10]
;;;92      if	(SpeedMotor) MotorBreak();		// .
000612  4886              LDR      r0,|L1.2092|
000614  6940              LDR      r0,[r0,#0x14]  ; SpeedMotor
000616  b108              CBZ      r0,|L1.1564|
000618  f7fffffe          BL       MotorBreak
                  |L1.1564|
;;;93     	timptr->CR1 &=~TIM_CR1_CEN;		//  .
00061c  8820              LDRH     r0,[r4,#0]
00061e  f0200001          BIC      r0,r0,#1
000622  8020              STRH     r0,[r4,#0]
;;;94     	timptr->CNT =0;				//   "0".
000624  84a5              STRH     r5,[r4,#0x24]
;;;95     } // -------------------------------------------
000626  bd30              POP      {r4,r5,pc}
;;;96     
                          ENDP

                  UpdateTOT PROC
;;;97     void UpdateTOT(){				//   -.
000628  4989              LDR      r1,|L1.2128|
;;;98     // ----------------------------------------------	
;;;99     	TTOT->CNT =0;
00062a  2000              MOVS     r0,#0
00062c  3124              ADDS     r1,r1,#0x24
00062e  8008              STRH     r0,[r1,#0]
;;;100    } // -------------------------------------------
000630  4770              BX       lr
;;;101    void MotorOn(){					//  .
                          ENDP

                  MotorOn PROC
000632  498a              LDR      r1,|L1.2140|
000634  b500              PUSH     {lr}
;;;102    // ----------------------------------------------	
;;;103    	StateX=1;				//      X.
000636  2001              MOVS     r0,#1
;;;104    	SetDirDC (DirX);			//  .
000638  f8c10180          STR      r0,[r1,#0x180]  ; lbufinfo
00063c  487b              LDR      r0,|L1.2092|
00063e  f9900000          LDRSB    r0,[r0,#0]  ; DirX
000642  f7fffffe          BL       SetDirDC
;;;105    	PWM_Set(VoltageMotor);			// 
000646  487d              LDR      r0,|L1.2108|
000648  3050              ADDS     r0,r0,#0x50
00064a  7800              LDRB     r0,[r0,#0]  ; ldebinfo
00064c  f85deb04          POP      {lr}
000650  e7fe              B        PWM_Set
;;;106    } // --------------------------------------------
;;;107    void WaitM(){					//   .
                          ENDP

                  WaitM PROC
000652  4876              LDR      r0,|L1.2092|
                  |L1.1620|
;;;108    // ----------------------------------------------	
;;;109    while (SpeedMotor);				//  ,  .
000654  6941              LDR      r1,[r0,#0x14]  ; SpeedMotor
000656  2900              CMP      r1,#0
000658  d1fc              BNE      |L1.1620|
;;;110    } // --------------------------------------------
00065a  4770              BX       lr
;;;111    void Motor(int speed, int pos){			//     POS   SPEED
                          ENDP

                  Motor PROC
00065c  b530              PUSH     {r4,r5,lr}
;;;112    // ----------------------------------------------	
;;;113     if (CurrLaserPos!=pos)
00065e  4a77              LDR      r2,|L1.2108|
000660  6814              LDR      r4,[r2,#0]  ; lbufinfo
000662  428c              CMP      r4,r1
000664  d021              BEQ      |L1.1706|
000666  4b71              LDR      r3,|L1.2092|
                  |L1.1640|
000668  695a              LDR      r2,[r3,#0x14]         ;111  ; SpeedMotor
00066a  2a00              CMP      r2,#0                 ;111
00066c  d1fc              BNE      |L1.1640|
;;;114     {	
;;;115    	WaitM();				//    .
;;;116    	VoltageMotor=pwmmax;			//   .
00066e  4a73              LDR      r2,|L1.2108|
000670  4d72              LDR      r5,|L1.2108|
000672  3210              ADDS     r2,r2,#0x10
000674  3550              ADDS     r5,r5,#0x50
000676  f8922029          LDRB     r2,[r2,#0x29]  ; lcnfbuf
00067a  702a              STRB     r2,[r5,#0]
;;;117    	i_value=0; d_value=0;			//     .
00067c  2500              MOVS     r5,#0
00067e  619d              STR      r5,[r3,#0x18]  ; i_value
;;;118      if (CurrLaserPos>pos) DirX=-1;		//   .
000680  61dd              STR      r5,[r3,#0x1c]  ; d_value
000682  428c              CMP      r4,r1
000684  dd01              BLE      |L1.1674|
000686  22ff              MOVS     r2,#0xff
000688  e000              B        |L1.1676|
                  |L1.1674|
;;;119      else			DirX=+1;
00068a  2201              MOVS     r2,#1
                  |L1.1676|
00068c  701a              STRB     r2,[r3,#0]
;;;120    	LaserPos=pos;				//   .
;;;121    	SpeedMotor=speed;			//     .
00068e  6299              STR      r1,[r3,#0x28]  ; LaserPos
000690  6158              STR      r0,[r3,#0x14]  ; SpeedMotor
;;;122    	SetTOT(TOT_TIME*10-1);			//   .
000692  f242700f          MOV      r0,#0x270f
000696  f7fffffe          BL       SetTOT
;;;123    indxmem=0;
;;;124    	MotorOn();				//  .
00069a  60dd              STR      r5,[r3,#0xc]  ; indxmem
00069c  f7fffffe          BL       MotorOn
;;;125    	TCAP->DIER|=TIM_DIER_UIE;		//     .
0006a0  486c              LDR      r0,|L1.2132|
0006a2  8801              LDRH     r1,[r0,#0]
0006a4  f0410101          ORR      r1,r1,#1
0006a8  8001              STRH     r1,[r0,#0]
                  |L1.1706|
;;;126     }
;;;127    } // --------------------------------------------
0006aa  bd30              POP      {r4,r5,pc}
;;;128    //  .
                          ENDP

                  EX_CMD_MVS PROC
;;;129    void EX_CMD_MVS(uint prm, puint ptr, uint len){	//  .
0006ac  b500              PUSH     {lr}
;;;130    // ----------------------------------------------
;;;131    	MotorBreak(); rSpeedY=BREAKSPEED; ACK();
0006ae  f7fffffe          BL       MotorBreak
0006b2  495e              LDR      r1,|L1.2092|
0006b4  485e              LDR      r0,|L1.2096|
0006b6  6388              STR      r0,[r1,#0x38]  ; rSpeedY
0006b8  f85deb04          POP      {lr}
0006bc  e7fe              B        ACK
;;;132    } // --------------------------------------------
;;;133    void EX_CMD_MVX(uint prm, puint ptr, uint len){	//     POS.
                          ENDP

                  EX_CMD_MVX PROC
0006be  b500              PUSH     {lr}
;;;134    // ----------------------------------------------
;;;135    	Motor(SpeedX,CalcStepX((int)prm)); ACK();
0006c0  f7fffffe          BL       CalcStepX
0006c4  4601              MOV      r1,r0
0006c6  485d              LDR      r0,|L1.2108|
0006c8  3010              ADDS     r0,r0,#0x10
0006ca  6a00              LDR      r0,[r0,#0x20]  ; lcnfbuf
0006cc  f7fffffe          BL       Motor
0006d0  f85deb04          POP      {lr}
0006d4  e7fe              B        ACK
;;;136    } // --------------------------------------------
;;;137    void EX_CMD_STX(uint prm, puint ptr, uint len){	//    STEPS .
                          ENDP

                  EX_CMD_STX PROC
0006d6  4959              LDR      r1,|L1.2108|
0006d8  b500              PUSH     {lr}
;;;138    // ----------------------------------------------
;;;139    	Motor(SpeedX,CurrLaserPos+(int)prm); ACK();
0006da  6809              LDR      r1,[r1,#0]  ; lbufinfo
0006dc  4401              ADD      r1,r1,r0
0006de  4857              LDR      r0,|L1.2108|
0006e0  3010              ADDS     r0,r0,#0x10
0006e2  6a00              LDR      r0,[r0,#0x20]  ; lcnfbuf
0006e4  f7fffffe          BL       Motor
0006e8  f85deb04          POP      {lr}
0006ec  e7fe              B        ACK
;;;140    } // --------------------------------------------
;;;141    void EX_CMD_SPX(uint prm, puint ptr, uint len){	//   .
                          ENDP

                  EX_CMD_SPX PROC
0006ee  4953              LDR      r1,|L1.2108|
;;;142    // ----------------------------------------------
;;;143    	SpeedX=prm; ACK();
0006f0  3110              ADDS     r1,r1,#0x10
0006f2  6208              STR      r0,[r1,#0x20]  ; lcnfbuf
0006f4  e7fe              B        ACK
;;;144    } // --------------------------------------------
;;;145    void EX_CMD_AXSX (uint prm, puint ptr, uint len){//   .
                          ENDP

                  EX_CMD_AXSX PROC
0006f6  b500              PUSH     {lr}
;;;146    // ----------------------------------------------	
;;;147    	CurrLaserPos=CalcStepX((int)prm); ACK();
0006f8  f7fffffe          BL       CalcStepX
0006fc  494f              LDR      r1,|L1.2108|
0006fe  6008              STR      r0,[r1,#0]  ; lbufinfo
000700  f85deb04          POP      {lr}
000704  e7fe              B        ACK
;;;148    } // --------------------------------------------
;;;17     #include "src\laser.c"
                          ENDP

                  LaserOff PROC
;;;25     */
;;;26     void LaserOff(){				//  .
000706  494b              LDR      r1,|L1.2100|
;;;27     // ----------------------------------------------
;;;28     	portLsr->BRR=MaskLasers;
000708  200f              MOVS     r0,#0xf
00070a  3114              ADDS     r1,r1,#0x14
00070c  6008              STR      r0,[r1,#0]
;;;29     }// ---------------------------------------------
00070e  4770              BX       lr
;;;30     void LaserOn(){					//  .
                          ENDP

                  LaserOn PROC
000710  4948              LDR      r1,|L1.2100|
;;;31     // ----------------------------------------------
;;;32     	portLsr->BSRR=MaskLasers;
000712  200f              MOVS     r0,#0xf
000714  3110              ADDS     r1,r1,#0x10
000716  6008              STR      r0,[r1,#0]
;;;33     }// ---------------------------------------------
000718  4770              BX       lr
;;;34     void SaveLDB(ushort val1,ushort val2){		//  .
                          ENDP

                  SaveLDB PROC
00071a  b510              PUSH     {r4,lr}
;;;35     // ----------------------------------------------
;;;36     	ldbuf[ildb]=val1;			//(  -  
00071c  4b43              LDR      r3,|L1.2092|
00071e  4c50              LDR      r4,|L1.2144|
000720  6cda              LDR      r2,[r3,#0x4c]  ; ildb
000722  f8240012          STRH     r0,[r4,r2,LSL #1]
;;;37     	ildb++;
000726  1c52              ADDS     r2,r2,#1
;;;38     	ldbuf[ildb]=val2;
000728  f8241012          STRH     r1,[r4,r2,LSL #1]
;;;39     	ildb++;
00072c  1c52              ADDS     r2,r2,#1
;;;40     	if (ildb>=szldb) ildb=0;
00072e  64da              STR      r2,[r3,#0x4c]  ; ildb
000730  f5b27f00          CMP      r2,#0x200
000734  d301              BCC      |L1.1850|
000736  2000              MOVS     r0,#0
000738  64d8              STR      r0,[r3,#0x4c]  ; ildb
                  |L1.1850|
;;;41     }// ---------------------------------------------
00073a  bd10              POP      {r4,pc}
;;;42     	
                          ENDP

                  OutLasers PROC
;;;43     void OutLasers(uint lmask, uint lbits){		//     .
00073c  4001              ANDS     r1,r1,r0
;;;44     // ----------------------------------------------
;;;45     	lbits&=lmask;				//   .
;;;46     	lbits=(lbits|((lbits^lmask)<<16));	//       16 .
00073e  4048              EORS     r0,r0,r1
000740  ea414000          ORR      r0,r1,r0,LSL #16
;;;47     	portLsr->BSRR=lbits;			//    .
000744  493b              LDR      r1,|L1.2100|
000746  3110              ADDS     r1,r1,#0x10
000748  6008              STR      r0,[r1,#0]
;;;48     } // --------------------------------------------
00074a  4770              BX       lr
;;;49     
                          ENDP

                  FlashLaser_4p PROC
;;;50     void FlashLaser_4p(uint pos){			//        "1".
00074c  4937              LDR      r1,|L1.2092|
;;;51     // ---------------------------------------------//  		76543210 76543210  
;;;52     uint lbits;					//  	0   1    2   3
;;;53     	lbits=ActBuffer[pos>>1];		//    .
;;;54     	lbits=lbits>>(4-((pos<<2&4)));		//  .
00074e  2204              MOVS     r2,#4
000750  6ac9              LDR      r1,[r1,#0x2c]         ;53  ; ActBuffer
000752  eb010150          ADD      r1,r1,r0,LSR #1       ;53
000756  ea020080          AND      r0,r2,r0,LSL #2
00075a  7809              LDRB     r1,[r1,#0]            ;53
00075c  f1c00004          RSB      r0,r0,#4
000760  40c1              LSRS     r1,r1,r0
;;;55     	OutLasers(15,lbits);			// 
000762  200f              MOVS     r0,#0xf
000764  e7fe              B        OutLasers
;;;56     } // --------------------------------------------
;;;57     void FlashLaser_2p(uint pos){			//        "1".
                          ENDP

                  FlashLaser_2p PROC
000766  4931              LDR      r1,|L1.2092|
;;;58     // ---------------------------------------------//  		76543210 76543210  
;;;59     uint lbits;					//  	0 1 2 3  4 5 6 7
;;;60     	lbits=ActBuffer[pos>>2];		//    .
;;;61     	lbits=lbits>>(6-((pos<<1&6)));		//  .
000768  2206              MOVS     r2,#6
00076a  6ac9              LDR      r1,[r1,#0x2c]         ;60  ; ActBuffer
00076c  eb010190          ADD      r1,r1,r0,LSR #2       ;60
000770  ea020040          AND      r0,r2,r0,LSL #1
000774  7809              LDRB     r1,[r1,#0]            ;60
000776  f1c00006          RSB      r0,r0,#6
00077a  40c1              LSRS     r1,r1,r0
;;;62     	OutLasers(3,lbits);			// 
00077c  2003              MOVS     r0,#3
00077e  e7fe              B        OutLasers
;;;63     } // --------------------------------------------
;;;64     void FlashLaser_1p(uint pos){			//        "1".
                          ENDP

                  FlashLaser_1p PROC
000780  492a              LDR      r1,|L1.2092|
;;;65     // ---------------------------------------------//  		76543210 76543210  
;;;66     uint lbits;					//  	01234567 89......
;;;67     	lbits=ActBuffer[pos>>3];		//    .
000782  6ac9              LDR      r1,[r1,#0x2c]  ; ActBuffer
000784  eb0101d0          ADD      r1,r1,r0,LSR #3
;;;68     	lbits=lbits>>(7-(pos&7));		//  .
000788  f0000007          AND      r0,r0,#7
00078c  7809              LDRB     r1,[r1,#0]            ;67
00078e  f1c00007          RSB      r0,r0,#7
000792  40c1              LSRS     r1,r1,r0
;;;69     	OutLasers(1,lbits);			// 
000794  2001              MOVS     r0,#1
000796  e7fe              B        OutLasers
;;;70     } // --------------------------------------------
;;;71     
                          ENDP

                  FlashLaser PROC
;;;72     void FlashLaser(int pos, uint offs){		//        "1".
000798  b570              PUSH     {r4-r6,lr}
;;;73     // ----------------------------------------------	
;;;74      if ((pos>=0)&&(pos<MaxPosEnc))	 CntPix--,	//    .
00079a  4d24              LDR      r5,|L1.2092|
00079c  1e04              SUBS     r4,r0,#0              ;72
00079e  f04f0600          MOV      r6,#0                 ;72
0007a2  db0f              BLT      |L1.1988|
0007a4  6a68              LDR      r0,[r5,#0x24]  ; MaxPosEnc
0007a6  4284              CMP      r4,r0
0007a8  d20c              BCS      |L1.1988|
0007aa  78a8              LDRB     r0,[r5,#2]  ; CntPix
0007ac  1e40              SUBS     r0,r0,#1
0007ae  70a8              STRB     r0,[r5,#2]
;;;75     	ExecFlash((uint)pos*qual+offs-1);	//    .
0007b0  4822              LDR      r0,|L1.2108|
0007b2  3010              ADDS     r0,r0,#0x10
0007b4  1e49              SUBS     r1,r1,#1
0007b6  f890002a          LDRB     r0,[r0,#0x2a]  ; lcnfbuf
0007ba  fb041000          MLA      r0,r4,r0,r1
0007be  6ca9              LDR      r1,[r5,#0x48]  ; ExecFlash
0007c0  4788              BLX      r1
0007c2  e004              B        |L1.1998|
                  |L1.1988|
0007c4  491b              LDR      r1,|L1.2100|
0007c6  200f              MOVS     r0,#0xf
0007c8  3114              ADDS     r1,r1,#0x14
0007ca  6008              STR      r0,[r1,#0]
;;;76      else	LaserOff(), CntPix=0;			// 
0007cc  70ae              STRB     r6,[r5,#2]
                  |L1.1998|
;;;77      if (CntPix)	TLSR->CR1=TIM_CR1_CEN;		//     .
0007ce  78a9              LDRB     r1,[r5,#2]  ; CntPix
0007d0  f04f4080          MOV      r0,#0x40000000
0007d4  b111              CBZ      r1,|L1.2012|
0007d6  2101              MOVS     r1,#1
0007d8  8001              STRH     r1,[r0,#0]
0007da  e000              B        |L1.2014|
                  |L1.2012|
;;;78      else		TLSR->CR1=0;
0007dc  8006              STRH     r6,[r0,#0]
                  |L1.2014|
;;;79      
;;;80      if (fDebug==DEB_MODE_TST)			//   .
0007de  6928              LDR      r0,[r5,#0x10]  ; fDebug
0007e0  2803              CMP      r0,#3
0007e2  d106              BNE      |L1.2034|
;;;81      {
;;;82     	SaveLDB(TCAP->CNT,(ushort)pos); 
0007e4  481b              LDR      r0,|L1.2132|
0007e6  b2a1              UXTH     r1,r4
0007e8  3018              ADDS     r0,r0,#0x18
0007ea  8800              LDRH     r0,[r0,#0]
0007ec  e8bd4070          POP      {r4-r6,lr}
0007f0  e7fe              B        SaveLDB
                  |L1.2034|
;;;83      }
;;;84     } // --------------------------------------------
0007f2  bd70              POP      {r4-r6,pc}
;;;85     void CheckFlashLaser(int pos, int dir){		//        "1".
                          ENDP

                  CheckFlashLaser PROC
0007f4  b570              PUSH     {r4-r6,lr}
;;;86     // ----------------------------------------------	
;;;87     uchar ql=Laser;
0007f6  4e0d              LDR      r6,|L1.2092|
0007f8  460d              MOV      r5,r1                 ;85
0007fa  f8961030          LDRB     r1,[r6,#0x30]  ; Laser
;;;88      if (ql==1)
0007fe  2901              CMP      r1,#1
000800  d111              BNE      |L1.2086|
;;;89      {
;;;90     	ql=0; TLSR->CNT=ql;			//    =0.
000802  f04f4280          MOV      r2,#0x40000000
000806  2100              MOVS     r1,#0
000808  8491              STRH     r1,[r2,#0x24]
;;;91     	ql=qual; CntPix=ql;			//    .
00080a  490c              LDR      r1,|L1.2108|
00080c  3110              ADDS     r1,r1,#0x10
00080e  f891402a          LDRB     r4,[r1,#0x2a]  ; lcnfbuf
000812  70b4              STRB     r4,[r6,#2]
;;;92       if (dir>0) ql=1;				//      .
000814  2d00              CMP      r5,#0
000816  dd00              BLE      |L1.2074|
000818  2401              MOVS     r4,#1
                  |L1.2074|
;;;93     	OffsPix=ql, FlashLaser(pos,ql);		//   c   ..
00081a  7074              STRB     r4,[r6,#1]
00081c  4621              MOV      r1,r4
00081e  f7fffffe          BL       FlashLaser
;;;94     	OffsPix=ql+dir;				//    .
000822  1960              ADDS     r0,r4,r5
000824  7070              STRB     r0,[r6,#1]
                  |L1.2086|
;;;95      }
;;;96     } // --------------------------------------------
000826  bd70              POP      {r4-r6,pc}
                  |L1.2088|
                          DCD      0x40010c10
                  |L1.2092|
                          DCD      ||.data||
                  |L1.2096|
                          DCD      0x0003f3af
                  |L1.2100|
                          DCD      0x40010800
                  |L1.2104|
                          DCD      0x11110000
                  |L1.2108|
                          DCD      ||.bss||
                  |L1.2112|
                          DCD      0x40012c00
                  |L1.2116|
                          DCD      0x40010000
                  |L1.2120|
                          DCD      0x40021000
                  |L1.2124|
                          DCD      0x3bb30000
                  |L1.2128|
                          DCD      0x40000400
                  |L1.2132|
                          DCD      0x4000080c
                  |L1.2136|
                          DCD      ||.ARM.alias.lbufinfo||
                  |L1.2140|
                          DCD      ||.ARM.alias.lbufinfo||
                  |L1.2144|
                          DCD      ||.bss||+0x2168
                          ENDP

                  ClearLaserPINS PROC
;;;97     
;;;98     void ClearLaserPINS(){				//    .
000864  48fe              LDR      r0,|L1.3168|
;;;99     // ----------------------------------------------	
;;;100    	portLsr_CR &=~(
000866  6801              LDR      r1,[r0,#0]
000868  f36f010f          BFC      r1,#0,#16
00086c  6001              STR      r1,[r0,#0]
;;;101    		(PinCR(pinLsr0,GPIOCR))|	//    .
;;;102    		(PinCR(pinLsr1,GPIOCR))|
;;;103    		(PinCR(pinLsr2,GPIOCR))|
;;;104    		(PinCR(pinLsr3,GPIOCR))
;;;105    		);
;;;106    } // --------------------------------------------
00086e  4770              BX       lr
;;;107    void LaserPWM(uint val){			//      (0.2%-100%).
                          ENDP

                  LaserPWM PROC
000870  b510              PUSH     {r4,lr}
;;;108    // ----------------------------------------------
;;;109    TIM_TypeDef *timptr=TLSR;
000872  f04f4180          MOV      r1,#0x40000000
000876  2401              MOVS     r4,#1
000878  f04f22e0          MOV      r2,#0xe000e000
00087c  108b              ASRS     r3,r1,#2
00087e  f8c23180          STR      r3,[r2,#0x180]
;;;110    	NVIC_DisableIRQ(TLSR_IRQn);		//    .
;;;111    	timptr->CCR1=val;			//  .
000882  8688              STRH     r0,[r1,#0x34]
;;;112    	timptr->CCR2=val;			//  .
000884  8708              STRH     r0,[r1,#0x38]
;;;113    	timptr->CCR3=val;			//  .
000886  8788              STRH     r0,[r1,#0x3c]
;;;114    	timptr->CCR4=val;			//  .
000888  f8a10040          STRH     r0,[r1,#0x40]
;;;115    	
;;;116    	timptr->PSC = (TLSR_CK/LSR_FREQ/LSR_RES-1);	// .
00088c  208f              MOVS     r0,#0x8f
00088e  8508              STRH     r0,[r1,#0x28]
;;;117    	timptr->ARR = (LSR_RES-1);		//  .
000890  f24030e7          MOV      r0,#0x3e7
000894  8588              STRH     r0,[r1,#0x2c]
;;;118    	
;;;119    	timptr->CCMR1=	(TIM_CCMR1_OC1M_1|
000896  f2460060          MOV      r0,#0x6060
00089a  8308              STRH     r0,[r1,#0x18]
;;;120    			 TIM_CCMR1_OC1M_2|
;;;121    			 TIM_CCMR1_OC2M_1|
;;;122    			 TIM_CCMR1_OC2M_2);	//   6.  1  2
;;;123    			 
;;;124    	timptr->CCMR2=	(TIM_CCMR2_OC3M_1|
00089c  8388              STRH     r0,[r1,#0x1c]
;;;125    			 TIM_CCMR2_OC3M_2|
;;;126    			 TIM_CCMR2_OC4M_1|
;;;127    			 TIM_CCMR2_OC4M_2);	//   6.  3  4
;;;128    			 
;;;129    	timptr->CCER =	(TIM_CCER_CC1E|		// CCE channel 1
00089e  f2411011          MOV      r0,#0x1111
0008a2  8408              STRH     r0,[r1,#0x20]
;;;130    			 TIM_CCER_CC2E|		// CCE channel 2
;;;131    			 TIM_CCER_CC3E|		// CCE channel 3
;;;132    			 TIM_CCER_CC4E);	// CCE channel 4
;;;133    	timptr->CR1=TIM_CR1_CEN;		//  .
0008a4  800c              STRH     r4,[r1,#0]
;;;134    
;;;135    	//    .
;;;136    
;;;137    	ClearLaserPINS();
0008a6  f7fffffe          BL       ClearLaserPINS
;;;138    	portLsr_CR |=(
0008aa  48ed              LDR      r0,|L1.3168|
0008ac  6801              LDR      r1,[r0,#0]
0008ae  f64b32bb          MOV      r2,#0xbbbb
0008b2  4311              ORRS     r1,r1,r2
0008b4  6001              STR      r1,[r0,#0]
;;;139    		(PinCR(pinLsr0,p_a_p50))|	//  .
;;;140    		(PinCR(pinLsr1,p_a_p50))|
;;;141    		(PinCR(pinLsr2,p_a_p50))|
;;;142    		(PinCR(pinLsr3,p_a_p50))
;;;143    		);
;;;144    } // --------------------------------------------
0008b6  bd10              POP      {r4,pc}
;;;145    void InitLaserWRK(){				//      .
                          ENDP

                  InitLaserWRK PROC
0008b8  49ea              LDR      r1,|L1.3172|
0008ba  b510              PUSH     {r4,lr}
;;;146    // ----------------------------------------------
;;;147    TIM_TypeDef *timptr=TLSR;
;;;148    	SET_PER_LSR				// ,  .
0008bc  69ca              LDR      r2,[r1,#0x1c]
0008be  f04f4080          MOV      r0,#0x40000000        ;147
0008c2  f0420201          ORR      r2,r2,#1
0008c6  61ca              STR      r2,[r1,#0x1c]
0008c8  49e7              LDR      r1,|L1.3176|
0008ca  684a              LDR      r2,[r1,#4]
0008cc  604a              STR      r2,[r1,#4]
;;;149    	
;;;150    	timptr->PSC=(TLSR_CK/FTCAP-1);		//    .
0008ce  2105              MOVS     r1,#5
0008d0  8501              STRH     r1,[r0,#0x28]
;;;151    	timptr->ARR=(0xFFFF);			//   .
0008d2  f64f71ff          MOV      r1,#0xffff
0008d6  8581              STRH     r1,[r0,#0x2c]
;;;152    	timptr->DIER =TIM_DIER_UIE;		//     .
0008d8  2101              MOVS     r1,#1
0008da  8181              STRH     r1,[r0,#0xc]
;;;153    	timptr->CR1=0;				//  .
0008dc  2100              MOVS     r1,#0
0008de  8001              STRH     r1,[r0,#0]
;;;154    	
;;;155    	//    GPIO .
;;;156    	
;;;157    	ClearLaserPINS();
0008e0  f7fffffe          BL       ClearLaserPINS
;;;158    	portLsr_CR |=(
0008e4  48de              LDR      r0,|L1.3168|
0008e6  6801              LDR      r1,[r0,#0]
0008e8  f2433233          MOV      r2,#0x3333
0008ec  4311              ORRS     r1,r1,r2
0008ee  6001              STR      r1,[r0,#0]
0008f0  49db              LDR      r1,|L1.3168|
0008f2  200f              MOVS     r0,#0xf
0008f4  3114              ADDS     r1,r1,#0x14
0008f6  6008              STR      r0,[r1,#0]
;;;159    		(PinCR(pinLsr0,p_o_p50))|	// GPIO. .
;;;160    		(PinCR(pinLsr1,p_o_p50))|
;;;161    		(PinCR(pinLsr2,p_o_p50))|
;;;162    		(PinCR(pinLsr3,p_o_p50))
;;;163    	);
;;;164    	LaserOff();
;;;165    	NVIC_SetPriority (TLSR_IRQn,PriorLSR);	// .
0008f8  2104              MOVS     r1,#4
0008fa  201c              MOVS     r0,#0x1c
0008fc  f7fffffe          BL       NVIC_SetPriority
;;;166    	NVIC_EnableIRQ(TLSR_IRQn);		//    .
000900  e8bd4010          POP      {r4,lr}
000904  201c              MOVS     r0,#0x1c
000906  f7ffbffe          B.W      NVIC_EnableIRQ
;;;167    } // --------------------------------------------
;;;168    
                          ENDP

                  LaserCTRL PROC
;;;169    void LaserCTRL(uint val){			// /  .
00090a  49d8              LDR      r1,|L1.3180|
;;;170    // ----------------------------------------------
;;;171    	Laser=val;
;;;172     if (val<=1)		InitLaserWRK();
00090c  2801              CMP      r0,#1
00090e  6308              STR      r0,[r1,#0x30]  ; Laser
000910  d800              BHI      |L1.2324|
000912  e7fe              B        InitLaserWRK
                  |L1.2324|
;;;173     else if (val==2)	LaserPWM(1);
000914  2802              CMP      r0,#2
000916  d100              BNE      |L1.2330|
000918  2001              MOVS     r0,#1
                  |L1.2330|
;;;174     else			LaserPWM(val);
00091a  e7fe              B        LaserPWM
;;;175    /*
;;;176     if (Laser!=val)				//  ?
;;;177     {
;;;178      if (Laser>1)					// 2-1000
;;;179      {						//    
;;;180       if (val!=1)		LaserPWM(val-1);	//   .
;;;181       else			InitLaserWRK();		//  .
;;;182      }
;;;183      else						// 0,1
;;;184      {						//   GPIO .
;;;185       if (Laser==1)	LaserOff();
;;;186      }
;;;187    	Laser=val;
;;;188     }
;;;189    */ 
;;;190    } // --------------------------------------------
;;;191    void EX_CMD_LPTR(uint prm, puint ptr, uint len){//    .
                          ENDP

                  EX_CMD_LPTR PROC
00091c  49d3              LDR      r1,|L1.3180|
;;;192    //-----------------------------------------------
;;;193    	ActBuffer=(puchar)prm;		ACK();
00091e  62c8              STR      r0,[r1,#0x2c]  ; ActBuffer
000920  e7fe              B        ACK
;;;194    } // --------------------------------------------
;;;195    void EX_CMD_LSR(uint prm, puint ptr, uint len){	// /  .
                          ENDP

                  EX_CMD_LSR PROC
000922  b510              PUSH     {r4,lr}
;;;196    // ----------------------------------------------	
;;;197    	LaserCTRL(prm);			ACK();
000924  f7fffffe          BL       LaserCTRL
000928  e8bd4010          POP      {r4,lr}
00092c  e7fe              B        ACK
;;;198    } // --------------------------------------------
;;;199    
                          ENDP

                  TIM2_IRQHandler PROC
;;;213    */
;;;214    void TLSR_IRQ(){				//    .
00092e  b570              PUSH     {r4-r6,lr}
;;;215    // ----------------------------------------------
;;;216    uint offs;
;;;217    	TLSR->SR=0; 				//   .
000930  f04f4180          MOV      r1,#0x40000000
000934  2000              MOVS     r0,#0
000936  8208              STRH     r0,[r1,#0x10]
;;;218    //						ldebinfo.res4++;
;;;219     if ((Laser==1)&&(CntPix))
000938  4ccc              LDR      r4,|L1.3180|
00093a  6b20              LDR      r0,[r4,#0x30]  ; Laser
00093c  2801              CMP      r0,#1
00093e  d10b              BNE      |L1.2392|
000940  78a0              LDRB     r0,[r4,#2]  ; CntPix
000942  2800              CMP      r0,#0
000944  d008              BEQ      |L1.2392|
;;;220     {	 
;;;221    	offs=OffsPix;				//    .
000946  7865              LDRB     r5,[r4,#1]  ; OffsPix
;;;222    	FlashLaser(CurrLaserPos,offs);		//  .
000948  48c9              LDR      r0,|L1.3184|
00094a  4629              MOV      r1,r5
00094c  6800              LDR      r0,[r0,#0]  ; lbufinfo
00094e  f7fffffe          BL       FlashLaser
;;;223    	offs+=DirX, OffsPix=offs;
000952  7820              LDRB     r0,[r4,#0]  ; DirX
000954  4428              ADD      r0,r0,r5
000956  7060              STRB     r0,[r4,#1]
                  |L1.2392|
;;;224     }
;;;225    }// ---------------------------------------------
000958  e765              B        |L1.2086|
;;;226    static void (*TabExecFlash[4])(uint pos)={
                          ENDP

                  ChangeLaserPos PROC
;;;37     }; // -------------------------------------------
;;;38     int  ChangeLaserPos(uint sti){			//   .
00095a  49c6              LDR      r1,|L1.3188|
;;;39     // ----------------------------------------------	
;;;40     int dir, pos;
;;;41     	sti=((sti&(TIM_SR_CC1IF|TIM_SR_CC2IF|	//   .
00095c  f000001e          AND      r0,r0,#0x1e
000960  ea4f0040          LSL      r0,r0,#1
;;;42     	TIM_SR_CC3IF|TIM_SR_CC4IF))<<1);	//    00xx xx00
;;;43      if ((portENC1->IDR)&(1<<pinEnc1)) sti|=1;
000964  680a              LDR      r2,[r1,#0]
000966  0652              LSLS     r2,r2,#25
000968  d501              BPL      |L1.2414|
00096a  f0400001          ORR      r0,r0,#1
                  |L1.2414|
;;;44      if ((portENC2->IDR)&(1<<pinEnc2)) sti|=2;	//  6  . 00iiiiPP
00096e  6809              LDR      r1,[r1,#0]
000970  05c9              LSLS     r1,r1,#23
000972  d501              BPL      |L1.2424|
000974  f0400002          ORR      r0,r0,#2
                  |L1.2424|
;;;45     	dir=tab_enc[sti];			//   .
000978  49bf              LDR      r1,|L1.3192|
;;;46     	pos=CurrLaserPos;			//  .
00097a  4abd              LDR      r2,|L1.3184|
;;;47     	pos+=dir; CurrLaserPos=pos;		//   .
00097c  2300              MOVS     r3,#0
00097e  5609              LDRSB    r1,[r1,r0]            ;45
000980  6810              LDR      r0,[r2,#0]  ; lbufinfo
000982  4408              ADD      r0,r0,r1
;;;48      if (dir!=0) UpdateTOT();			//   -  -.
000984  6010              STR      r0,[r2,#0]  ; lbufinfo
000986  b109              CBZ      r1,|L1.2444|
000988  4abc              LDR      r2,|L1.3196|
00098a  8013              STRH     r3,[r2,#0]
                  |L1.2444|
;;;49     //						else ldebinfo.err1++;//  .  .
;;;50      if (fDebug==DEB_MODE_PID)
00098c  4ab7              LDR      r2,|L1.3180|
00098e  6912              LDR      r2,[r2,#0x10]  ; fDebug
000990  2a01              CMP      r2,#1
000992  d10b              BNE      |L1.2476|
;;;51      {	
;;;52       if (!CurrLaserPos)
000994  2800              CMP      r0,#0
000996  d109              BNE      |L1.2476|
000998  4ab4              LDR      r2,|L1.3180|
;;;53       {	
;;;54         if (dir>0)	lbuf0[indxmem-1]=0;		//  0- .
00099a  2900              CMP      r1,#0
00099c  68d2              LDR      r2,[r2,#0xc]
00099e  dd01              BLE      |L1.2468|
0009a0  49b7              LDR      r1,|L1.3200|
0009a2  e000              B        |L1.2470|
                  |L1.2468|
;;;55         else	lbuf1[indxmem-1]=0;
0009a4  49b7              LDR      r1,|L1.3204|
                  |L1.2470|
0009a6  4411              ADD      r1,r1,r2
0009a8  f8013c01          STRB     r3,[r1,#-1]
                  |L1.2476|
;;;56       }
;;;57      }
;;;58     	return (pos);
;;;59     } // --------------------------------------------
0009ac  4770              BX       lr
;;;60     void SpeedRegulator(uint cspd){			//  .
                          ENDP

                  SpeedRegulator PROC
0009ae  b530              PUSH     {r4,r5,lr}
;;;61     
;;;62     uint	vm;
;;;63     int	serr,ival;
;;;64     
;;;65     if (SpeedMotor)
0009b0  4dae              LDR      r5,|L1.3180|
0009b2  6969              LDR      r1,[r5,#0x14]  ; SpeedMotor
0009b4  2900              CMP      r1,#0                 ;60
0009b6  d029              BEQ      |L1.2572|
;;;66      {
;;;67       if (!cspd)	cspd=1;				//     0.
0009b8  b900              CBNZ     r0,|L1.2492|
0009ba  2001              MOVS     r0,#1
                  |L1.2492|
;;;68     	cspd=ResolX*cspd/STROKE;
0009bc  49ac              LDR      r1,|L1.3184|
;;;69     	cspd=FTCAP/1000*UnitX/cspd;		//  cspd    /.
0009be  f64263e0          MOV      r3,#0x2ee0
0009c2  3110              ADDS     r1,r1,#0x10           ;68
0009c4  690a              LDR      r2,[r1,#0x10]         ;68  ; lcnfbuf
0009c6  4342              MULS     r2,r0,r2              ;68
0009c8  0890              LSRS     r0,r2,#2              ;68
0009ca  694a              LDR      r2,[r1,#0x14]  ; lcnfbuf
0009cc  435a              MULS     r2,r3,r2
0009ce  fbb2f0f0          UDIV     r0,r2,r0
;;;70     	AvrgSpd=cspd;				//   .
0009d2  4aa7              LDR      r2,|L1.3184|
;;;71     
;;;72     	ival=i_value;
0009d4  6090              STR      r0,[r2,#8]  ; lbufinfo
;;;73     //	dval=d_value;		// 
;;;74     	
;;;75     	serr=SpeedMotor-cspd;			//   .
0009d6  e9d53205          LDRD     r3,r2,[r5,#0x14]
0009da  1a18              SUBS     r0,r3,r0
;;;76     	ival+=serr;				//    .
0009dc  1814              ADDS     r4,r2,r0
;;;77     //	dval=serr-d_value;			//    .
;;;78     	
;;;79     //	vm = ((serr*k_prp)+(ival*k_int)-(dval*k_dif))/k_com + pwmmin;
;;;80     	vm = ((serr*k_prp)+(ival*k_int))/k_com + pwmmin;
0009de  680a              LDR      r2,[r1,#0]  ; lcnfbuf
0009e0  4342              MULS     r2,r0,r2
0009e2  6848              LDR      r0,[r1,#4]  ; lcnfbuf
0009e4  fb042000          MLA      r0,r4,r0,r2
0009e8  68ca              LDR      r2,[r1,#0xc]  ; lcnfbuf
0009ea  fb90f0f2          SDIV     r0,r0,r2
0009ee  f8912028          LDRB     r2,[r1,#0x28]  ; lcnfbuf
;;;81     	
;;;82       if (vm>pwmmax) vm=pwmmax;			//    .
0009f2  f8911029          LDRB     r1,[r1,#0x29]  ; lcnfbuf
0009f6  4410              ADD      r0,r0,r2              ;80
0009f8  4281              CMP      r1,r0
0009fa  d200              BCS      |L1.2558|
0009fc  4608              MOV      r0,r1
                  |L1.2558|
;;;83     	VoltageMotor=vm; PWM_Set(vm);		//   .
0009fe  499c              LDR      r1,|L1.3184|
000a00  3150              ADDS     r1,r1,#0x50
000a02  7008              STRB     r0,[r1,#0]
000a04  b280              UXTH     r0,r0
000a06  f7fffffe          BL       PWM_Set
;;;84     	i_value=ival;				//   .
000a0a  61ac              STR      r4,[r5,#0x18]  ; i_value
                  |L1.2572|
;;;85     //	d_value=serr;				//   .
;;;86      }
;;;87     } // --------------------------------------------
000a0c  bd30              POP      {r4,r5,pc}
;;;88     void CheckStop(int pos, int dir){		//    .
                          ENDP

                  CheckStop PROC
000a0e  b570              PUSH     {r4-r6,lr}
;;;89      if 	(SpeedMotor)				//    ?
000a10  4d96              LDR      r5,|L1.3180|
000a12  4604              MOV      r4,r0                 ;88
000a14  460e              MOV      r6,r1                 ;88
000a16  6968              LDR      r0,[r5,#0x14]  ; SpeedMotor
000a18  b150              CBZ      r0,|L1.2608|
000a1a  4628              MOV      r0,r5
;;;90      {
;;;91       if (dir<0)
000a1c  2e00              CMP      r6,#0
;;;92       {
;;;93       if (pos<=LaserPos) MotorBreak();
000a1e  6a80              LDR      r0,[r0,#0x28]
000a20  da02              BGE      |L1.2600|
000a22  4284              CMP      r4,r0
000a24  dd02              BLE      |L1.2604|
000a26  e003              B        |L1.2608|
                  |L1.2600|
;;;94       }
;;;95       else if (pos>=LaserPos) MotorBreak();
000a28  4284              CMP      r4,r0
000a2a  db01              BLT      |L1.2608|
                  |L1.2604|
000a2c  f7fffffe          BL       MotorBreak
                  |L1.2608|
;;;96      }
;;;97      if (fDebug==DEB_MODE_PID)
000a30  6928              LDR      r0,[r5,#0x10]  ; fDebug
000a32  2801              CMP      r0,#1
000a34  d10c              BNE      |L1.2640|
;;;98      {	
;;;99       if (pos==LaserPos)
000a36  6aa8              LDR      r0,[r5,#0x28]  ; LaserPos
000a38  4284              CMP      r4,r0
000a3a  d109              BNE      |L1.2640|
000a3c  2000              MOVS     r0,#0
;;;100      {	
;;;101        if (dir>0)	lbuf0[indxmem-1]=0;		//  .
000a3e  2e00              CMP      r6,#0
000a40  dd01              BLE      |L1.2630|
000a42  498f              LDR      r1,|L1.3200|
000a44  e000              B        |L1.2632|
                  |L1.2630|
;;;102        else	lbuf1[indxmem-1]=0;
000a46  498f              LDR      r1,|L1.3204|
                  |L1.2632|
000a48  68ea              LDR      r2,[r5,#0xc]  ; indxmem
000a4a  4411              ADD      r1,r1,r2
000a4c  f8010c01          STRB     r0,[r1,#-1]
                  |L1.2640|
;;;103      }
;;;104     }
;;;105    } // --------------------------------------------
000a50  e6e9              B        |L1.2086|
;;;106    
                          ENDP

                  TIM4_IRQHandler PROC
;;;107    void TCAP_IRQ(){				//    .
000a52  e92d47f0          PUSH     {r4-r10,lr}
;;;108    // ----------------------------------------------
;;;109    int lpos;
;;;110    int dir;
;;;111    uint cspd;
;;;112    uint sti;
;;;113    uint tmp;
;;;114    TIM_TypeDef *timptr=TCAP;			//    .
000a56  4c8c              LDR      r4,|L1.3208|
;;;115    
;;;116    	tmp=timptr->CNT;			//       ( ).
000a58  f8b48024          LDRH     r8,[r4,#0x24]
;;;117    	dir=DirX,				//   .
000a5c  4e83              LDR      r6,|L1.3180|
;;;118    	sti=timptr->SR; timptr->SR=0;		//  .
000a5e  8a25              LDRH     r5,[r4,#0x10]
000a60  f9967000          LDRSB    r7,[r6,#0]            ;117  ; DirX
000a64  f04f0900          MOV      r9,#0
000a68  f8a49010          STRH     r9,[r4,#0x10]
;;;119    //***********************************************
;;;120     if (sti&(TIM_SR_CC1IF|TIM_SR_CC2IF|TIM_SR_CC3IF|TIM_SR_CC4IF))	//     .
000a6c  f0150f1e          TST      r5,#0x1e
000a70  d00a              BEQ      |L1.2696|
;;;121     {
;;;122    	lpos=ChangeLaserPos(sti);		//   .
000a72  4628              MOV      r0,r5
000a74  f7fffffe          BL       ChangeLaserPos
000a78  4682              MOV      r10,r0
;;;123    	CheckFlashLaser(lpos, dir);		//    .
000a7a  4639              MOV      r1,r7
000a7c  f7fffffe          BL       CheckFlashLaser
;;;124    	CheckStop(lpos, dir);			//     .
000a80  4639              MOV      r1,r7
000a82  4650              MOV      r0,r10
000a84  f7fffffe          BL       CheckStop
                  |L1.2696|
;;;125     } //******************************************
;;;126    	cspd=timptr->CCR1;
000a88  f8b4c034          LDRH     r12,[r4,#0x34]
;;;127     if (sti&TIM_SR_UIF) CapNCCR=0;			//    .
000a8c  07e8              LSLS     r0,r5,#31
000a8e  d001              BEQ      |L1.2708|
000a90  f8c69020          STR      r9,[r6,#0x20]  ; CapNCCR
                  |L1.2708|
;;;128     if (sti&TIM_SR_CC1IF)				//      .
000a94  07a8              LSLS     r0,r5,#30
;;;129     {
;;;130    	CapNCCR++;				//    .
;;;131      if(CapNCCR>1) SpeedRegulator(cspd);
;;;132      else 		SpeedRegulator(0xFFFFFFF);
;;;133      if (fDebug==DEB_MODE_TST)			//   .
;;;134      {
;;;135    	SaveLDB(0,(ushort)cspd);
;;;136    	EntryCNT=tmp-cspd;			//     ( ).
000a96  4d76              LDR      r5,|L1.3184|
000a98  f1050550          ADD      r5,r5,#0x50
000a9c  d527              BPL      |L1.2798|
000a9e  6a30              LDR      r0,[r6,#0x20]         ;130  ; CapNCCR
000aa0  1c40              ADDS     r0,r0,#1              ;130
000aa2  6230              STR      r0,[r6,#0x20]         ;131  ; CapNCCR
000aa4  2801              CMP      r0,#1                 ;131
000aa6  d901              BLS      |L1.2732|
000aa8  4660              MOV      r0,r12                ;131
000aaa  e001              B        |L1.2736|
                  |L1.2732|
000aac  f06f4070          MVN      r0,#0xf0000000        ;132
                  |L1.2736|
000ab0  f7fffffe          BL       SpeedRegulator
000ab4  6930              LDR      r0,[r6,#0x10]         ;133  ; fDebug
000ab6  2803              CMP      r0,#3                 ;133
000ab8  d108              BNE      |L1.2764|
000aba  4661              MOV      r1,r12                ;135
000abc  2000              MOVS     r0,#0                 ;135
000abe  f7fffffe          BL       SaveLDB
000ac2  eba8000c          SUB      r0,r8,r12
000ac6  8068              STRH     r0,[r5,#2]
;;;137    	ExitCNT=timptr->CNT;			//     ( ).
000ac8  8ca0              LDRH     r0,[r4,#0x24]
000aca  80e8              STRH     r0,[r5,#6]
                  |L1.2764|
;;;138      }
;;;139    	timptr->CNT-=cspd;			//   . 
000acc  8ca0              LDRH     r0,[r4,#0x24]
000ace  eba0000c          SUB      r0,r0,r12
000ad2  84a0              STRH     r0,[r4,#0x24]
;;;140      if (Laser==1)	TLSR->ARR=(cspd/(qual*STROKE));	//    .
000ad4  6b30              LDR      r0,[r6,#0x30]  ; Laser
000ad6  2801              CMP      r0,#1
000ad8  d109              BNE      |L1.2798|
000ada  4865              LDR      r0,|L1.3184|
000adc  f04f4180          MOV      r1,#0x40000000
000ae0  3010              ADDS     r0,r0,#0x10
000ae2  f890002a          LDRB     r0,[r0,#0x2a]  ; lcnfbuf
000ae6  0080              LSLS     r0,r0,#2
000ae8  fbbcf0f0          UDIV     r0,r12,r0
000aec  8588              STRH     r0,[r1,#0x2c]
                  |L1.2798|
;;;141     }	 
;;;142     //********************************************** 
;;;143     if (fDebug==DEB_MODE_PID)			//   .
000aee  6930              LDR      r0,[r6,#0x10]  ; fDebug
000af0  2801              CMP      r0,#1
000af2  d115              BNE      |L1.2848|
;;;144     {
;;;145    	cspd=AvrgSpd/8;				//   .
000af4  485e              LDR      r0,|L1.3184|
;;;146      if (indxmem<SIZEBUFUNI/2-1)			//  .
000af6  f24072ff          MOV      r2,#0x7ff
000afa  6880              LDR      r0,[r0,#8]            ;145  ; lbufinfo
000afc  17c1              ASRS     r1,r0,#31             ;145
000afe  eb007051          ADD      r0,r0,r1,LSR #29      ;145
000b02  10c1              ASRS     r1,r0,#3              ;145
000b04  68f0              LDR      r0,[r6,#0xc]  ; indxmem
000b06  4290              CMP      r0,r2
000b08  d20a              BCS      |L1.2848|
;;;147      {
;;;148        if (dir>0)
000b0a  2f00              CMP      r7,#0
000b0c  dd01              BLE      |L1.2834|
;;;149       {
;;;150    	lbuf0[indxmem+0]=(char)cspd;
000b0e  4a5c              LDR      r2,|L1.3200|
;;;151    	lbuf0[indxmem+1]=VoltageMotor;
000b10  e000              B        |L1.2836|
                  |L1.2834|
;;;152       }	
;;;153       else
;;;154       {
;;;155      	lbuf1[indxmem+0]=(char)cspd;
000b12  4a5c              LDR      r2,|L1.3204|
                  |L1.2836|
000b14  5411              STRB     r1,[r2,r0]
;;;156    	lbuf1[indxmem+1]=VoltageMotor;
000b16  4402              ADD      r2,r2,r0
000b18  7829              LDRB     r1,[r5,#0]  ; ldebinfo
000b1a  7051              STRB     r1,[r2,#1]
;;;157       }
;;;158    	indxmem+=2;
000b1c  1c80              ADDS     r0,r0,#2
000b1e  60f0              STR      r0,[r6,#0xc]  ; indxmem
                  |L1.2848|
;;;159      }	
;;;160     }
;;;161    }// ---------------------------------------------
000b20  e8bd87f0          POP      {r4-r10,pc}
;;;162    
                          ENDP

                  Init_TIM_ENC PROC
;;;163    void Init_TIM_ENC(){				//
000b24  b510              PUSH     {r4,lr}
;;;164    // ----------------------------------------------
;;;165    TIM_TypeDef *timptr=TCAP;
;;;166    	SET_PER_CAP				//  ,  .
000b26  484f              LDR      r0,|L1.3172|
000b28  4c57              LDR      r4,|L1.3208|
000b2a  69c1              LDR      r1,[r0,#0x1c]
000b2c  f0410104          ORR      r1,r1,#4
000b30  61c1              STR      r1,[r0,#0x1c]
;;;167    	
;;;168    	portENC1->CRL &=~(PinCR(pinEnc1,GPIOCR));
000b32  4850              LDR      r0,|L1.3188|
000b34  3808              SUBS     r0,r0,#8
000b36  6801              LDR      r1,[r0,#0]
000b38  f0216170          BIC      r1,r1,#0xf000000
000b3c  6001              STR      r1,[r0,#0]
;;;169    	portENC1->CRL |= (PinCR(pinEnc1,p_i_p));//  1    .
000b3e  6801              LDR      r1,[r0,#0]
000b40  f0416100          ORR      r1,r1,#0x8000000
000b44  6001              STR      r1,[r0,#0]
;;;170    	portENC2->CRL &=~(PinCR(pinEnc2,GPIOCR));		
000b46  6801              LDR      r1,[r0,#0]
000b48  f021010f          BIC      r1,r1,#0xf
000b4c  6001              STR      r1,[r0,#0]
;;;171    	portENC2->CRL |= (PinCR(pinEnc2,p_i_p));//  2    .
000b4e  6801              LDR      r1,[r0,#0]
000b50  f0410108          ORR      r1,r1,#8
000b54  6001              STR      r1,[r0,#0]
;;;172    	
;;;173    	timptr->PSC  =(TCAP_CK/FTCAP-1);	// .
000b56  2005              MOVS     r0,#5
000b58  8520              STRH     r0,[r4,#0x28]
;;;174    	timptr->ARR  =(0xFFFF);			//   .
000b5a  f64f70ff          MOV      r0,#0xffff
000b5e  85a0              STRH     r0,[r4,#0x2c]
;;;175    
;;;176    	timptr->CCMR1 =  (TIM_CCMR1_CC2S_1|
000b60  f2442041          MOV      r0,#0x4241
000b64  8320              STRH     r0,[r4,#0x18]
;;;177    			TIM_CCMR1_CC1S_0|
;;;178    			TIM_CCMR1_IC1F_2|
;;;179    			TIM_CCMR1_IC2F_2);	//  1 2    ,  6*Fdts/2.
;;;180    	timptr->CCMR2 =  (TIM_CCMR2_CC4S_1|
000b66  83a0              STRH     r0,[r4,#0x1c]
;;;181    			TIM_CCMR2_CC3S_0|
;;;182    			TIM_CCMR2_IC3F_2|
;;;183    			TIM_CCMR2_IC4F_2);	//  3 4    ,  6*Fdts/2.
;;;184    	timptr->DIER=  (
000b68  201f              MOVS     r0,#0x1f
000b6a  81a0              STRH     r0,[r4,#0xc]
;;;185    			TIM_DIER_UIE|		//   .
;;;186    			TIM_DIER_CC1IE|
;;;187    			TIM_DIER_CC2IE|		//   1  2 .
;;;188    			TIM_DIER_CC3IE|
;;;189    			TIM_DIER_CC4IE
;;;190    			);			//   3  4 .
;;;191    	NVIC_SetPriority (TCAP_IRQn,PriorCAP);	// .
000b6c  2102              MOVS     r1,#2
000b6e  201e              MOVS     r0,#0x1e
000b70  f7fffffe          BL       NVIC_SetPriority
;;;192    	NVIC_EnableIRQ(TCAP_IRQn);		//    TIM.
000b74  201e              MOVS     r0,#0x1e
000b76  f7fffffe          BL       NVIC_EnableIRQ
;;;193    	
;;;194    	timptr->CCER |= (TIM_CCER_CC4E|
000b7a  8c20              LDRH     r0,[r4,#0x20]
000b7c  f2431131          MOV      r1,#0x3131
000b80  4308              ORRS     r0,r0,r1
000b82  8420              STRH     r0,[r4,#0x20]
;;;195    			TIM_CCER_CC4P|		// 4    .
;;;196    			TIM_CCER_CC3E|		// 3    .
;;;197    			TIM_CCER_CC2E|
;;;198    			TIM_CCER_CC2P|		// 2    .
;;;199    			TIM_CCER_CC1E);		// 1    .
;;;200    /*	timptr->SMCR=  (
;;;201    			TIM_SMCR_MSM|
;;;202    			TIM_SMCR_TS_2|		// TIFP1
;;;203    			TIM_SMCR_TS_0
;;;204    			);
;;;205    	timptr->SMCR=  (
;;;206    			TIM_SMCR_MSM|
;;;207    			TIM_SMCR_SMS_2|		// Reset .	    .
;;;208    			TIM_SMCR_TS_2|
;;;209    			TIM_SMCR_TS_0
;;;210    			);
;;;211    */			
;;;212    	timptr->CR1 |= TIM_CR1_CEN;		//  .
000b84  8820              LDRH     r0,[r4,#0]
000b86  f0400001          ORR      r0,r0,#1
000b8a  8020              STRH     r0,[r4,#0]
;;;213    }// ---------------------------------------------
000b8c  bd10              POP      {r4,pc}
;;;19     #endif
                          ENDP

                  RemapToRAM PROC
;;;29     }// ---------------------------------------------
;;;30     /* __inline */ void RemapToRAM(){		//
000b8e  4935              LDR      r1,|L1.3172|
;;;31     // ----------------------------------------------	
;;;32     	RCC->CIR = 0x00000000;			//  .
000b90  2000              MOVS     r0,#0
000b92  6088              STR      r0,[r1,#8]
;;;33     	SCB->VTOR = SRAM_BASE;			//   .
000b94  0448              LSLS     r0,r1,#17
000b96  493d              LDR      r1,|L1.3212|
000b98  6008              STR      r0,[r1,#0]
;;;34     }// ---------------------------------------------
000b9a  4770              BX       lr
;;;35     
                          ENDP

                  EX_CMD_DBG PROC
;;;3      //***********************************************
;;;4      void EX_CMD_DBG  (uint prm, puint ptr, uint len){// / .
000b9c  4933              LDR      r1,|L1.3180|
;;;5      // ----------------------------------------------	
;;;6      	fDebug=prm;			ACK();
000b9e  6108              STR      r0,[r1,#0x10]  ; fDebug
000ba0  f7ffbffe          B.W      ACK
;;;7      } // --------------------------------------------
;;;8      void EX_CMD_ACK  (uint prm, puint ptr, uint len){// .
                          ENDP

                  EX_CMD_ACK PROC
000ba4  f7ffbffe          B.W      ACK
;;;9      // ----------------------------------------------
;;;10     	ACK();
;;;11     }//______________________________________________
;;;12     void EX_CMD_INFO (uint prm, puint ptr, uint len){//     .
                          ENDP

                  EX_CMD_INFO PROC
000ba8  2201              MOVS     r2,#1
;;;13     // ----------------------------------------------
;;;14     	SendBlock
000baa  2110              MOVS     r1,#0x10
000bac  4838              LDR      r0,|L1.3216|
000bae  f7ffbffe          B.W      SendBlock
;;;15     	(
;;;16     	(puchar)&tab_mcu,
;;;17     	sizeof(MCUINFO),
;;;18     	CMD_INFO
;;;19     	);
;;;20     }//______________________________________________
;;;21     void EX_CMD_BOOT (uint prm, puint ptr, uint len){//  .
                          ENDP

                  EX_CMD_BOOT PROC
000bb2  b500              PUSH     {lr}
;;;22     // ----------------------------------------------
;;;23     	ACK(); SER_WaitTx();			// .   .
000bb4  f7fffffe          BL       ACK
000bb8  4836              LDR      r0,|L1.3220|
000bba  8800              LDRH     r0,[r0,#0]
;;;24     	SCB->AIRCR=
000bbc  4933              LDR      r1,|L1.3212|
000bbe  4836              LDR      r0,|L1.3224|
000bc0  1d09              ADDS     r1,r1,#4
000bc2  6008              STR      r0,[r1,#0]
;;;25     	(0x5FA0000+SCB_AIRCR_SYSRESETREQ);	//     .
;;;26     }//______________________________________________
000bc4  bd00              POP      {pc}
;;;27     void EX_CMD_READ (uint prm, puint ptr, uint len){//    .
                          ENDP

                  EX_CMD_READ PROC
000bc6  7809              LDRB     r1,[r1,#0]
;;;28     // ----------------------------------------------
;;;29     //printf(" \r\nread ptr 0x%p i %d len %d",ptr,i,len);
;;;30     	SendBlock(
000bc8  2204              MOVS     r2,#4
000bca  f7ffbffe          B.W      SendBlock
;;;31     	(puchar)prm,
;;;32     	(uchar)ptr[0],
;;;33     	CMD_READ);
;;;34     }//______________________________________________
;;;35     void EX_CMD_WRITE(uint prm, puint ptr, uint len){//    .
                          ENDP

                  EX_CMD_WRITE PROC
000bce  b510              PUSH     {r4,lr}
;;;36     // ----------------------------------------------
;;;37     	memcpy ((puchar)prm,ptr,len);	ACK();	//
000bd0  f7fffffe          BL       __aeabi_memcpy
000bd4  e8bd4010          POP      {r4,lr}
000bd8  f7ffbffe          B.W      ACK
;;;38     }//______________________________________________
;;;39     void EX_CMD_CONF (uint prm, puint ptr, uint len){//  "
                          ENDP

                  EX_CMD_CONF PROC
000bdc  4824              LDR      r0,|L1.3184|
000bde  b410              PUSH     {r4}
;;;40     // ----------------------------------------------
;;;41     //	BitOffset=qual*cnlas;			//      .
;;;42     //	BitLasMask=~(0xFFFFFFFF<<cnlas);	//    .
;;;43     	MaxPosEnc=(SIZEBUFUNI*UnitX/ResolX)/8;
000be0  3010              ADDS     r0,r0,#0x10
000be2  4b22              LDR      r3,|L1.3180|
000be4  6941              LDR      r1,[r0,#0x14]  ; lcnfbuf
000be6  6902              LDR      r2,[r0,#0x10]  ; lcnfbuf
000be8  0309              LSLS     r1,r1,#12
000bea  fb91f1f2          SDIV     r1,r1,r2
000bee  17ca              ASRS     r2,r1,#31
000bf0  eb017152          ADD      r1,r1,r2,LSR #29
000bf4  10c9              ASRS     r1,r1,#3
;;;44      if (!cnlas) cnlas=1; else if (cnlas>4) cnlas=4;
000bf6  6259              STR      r1,[r3,#0x24]  ; MaxPosEnc
000bf8  f890102b          LDRB     r1,[r0,#0x2b]  ; lcnfbuf
000bfc  2201              MOVS     r2,#1
000bfe  2404              MOVS     r4,#4
000c00  b1b1              CBZ      r1,|L1.3120|
000c02  2904              CMP      r1,#4
000c04  d901              BLS      |L1.3082|
000c06  f880402b          STRB     r4,[r0,#0x2b]
                  |L1.3082|
;;;45      if ( !qual)  qual=1; else if ( qual>4)  qual=4;
000c0a  f890102a          LDRB     r1,[r0,#0x2a]  ; lcnfbuf
000c0e  b191              CBZ      r1,|L1.3126|
000c10  2904              CMP      r1,#4
000c12  d901              BLS      |L1.3096|
000c14  f880402a          STRB     r4,[r0,#0x2a]
                  |L1.3096|
;;;46     	ExecFlash=TabExecFlash[cnlas-1];
000c18  4914              LDR      r1,|L1.3180|
000c1a  f890002b          LDRB     r0,[r0,#0x2b]  ; lcnfbuf
000c1e  3160              ADDS     r1,r1,#0x60
000c20  eb010080          ADD      r0,r1,r0,LSL #2
000c24  f8500c04          LDR      r0,[r0,#-4]
;;;47     	ACK();					//   .
000c28  6498              STR      r0,[r3,#0x48]  ; ExecFlash
000c2a  bc10              POP      {r4}
000c2c  f7ffbffe          B.W      ACK
                  |L1.3120|
000c30  f880202b          STRB     r2,[r0,#0x2b]         ;44
000c34  e7e9              B        |L1.3082|
                  |L1.3126|
000c36  f880202a          STRB     r2,[r0,#0x2a]         ;45
000c3a  e7ed              B        |L1.3096|
;;;48     }//______________________________________________
;;;49     static void (*TabExecCMD[])(uint prm, puint ptr, uint len)={
                          ENDP

                  CHECK_INPUT_BIN PROC
;;;68     };// ----------------------------------------------
;;;69     uint CHECK_INPUT_BIN(uint i,puchar _ptr,uchar chr){	//      .
000c3c  b570              PUSH     {r4-r6,lr}
;;;70     // ----------------------------------------------
;;;71     //	ptr	   .
;;;72     //	it	   .
;;;73     uint len;
;;;74     uint ks, i;
;;;75     PtrPackTypes ptr;
;;;76     	ptr.uc=_ptr;
;;;77     	ptr.uc[i]=chr;				//     .
000c3e  540a              STRB     r2,[r1,r0]
;;;78     	ptr.uc+=SIZEBUFRX;
000c40  3180              ADDS     r1,r1,#0x80
;;;79     	ptr.uc[i]=chr;				//     .
;;;80     	i++;					// 
000c42  1c46              ADDS     r6,r0,#1
000c44  540a              STRB     r2,[r1,r0]            ;79
;;;81      if (chr==CHAREND)
000c46  2ae7              CMP      r2,#0xe7
000c48  d143              BNE      |L1.3282|
;;;82      {
;;;83     	ptr.uc+=(i-sizeof(RSHDRE));		//     RSHDR.
000c4a  1f30              SUBS     r0,r6,#4
000c4c  4408              ADD      r0,r0,r1
;;;84     	len=ptr.prse->len;			//    ,  LEN.
000c4e  7802              LDRB     r2,[r0,#0]
;;;85       if (len>=sizeof(RSHDR)&&(len<SIZEBUFRX))	//   .
000c50  1f91              SUBS     r1,r2,#6
000c52  297a              CMP      r1,#0x7a
000c54  d23d              BCS      |L1.3282|
;;;86       {
;;;87       	ptr.uc+=(sizeof(RSHDRE)-len);		//     .
000c56  f1c20104          RSB      r1,r2,#4
000c5a  1844              ADDS     r4,r0,r1
;;;88        if (ptr.uc[0]==CHARBEG)			// ..  CHARBEG.
000c5c  7820              LDRB     r0,[r4,#0]
000c5e  e01d              B        |L1.3228|
                  |L1.3168|
                          DCD      0x40010800
                  |L1.3172|
                          DCD      0x40021000
                  |L1.3176|
                          DCD      0x40010000
                  |L1.3180|
                          DCD      ||.data||
                  |L1.3184|
                          DCD      ||.bss||
                  |L1.3188|
                          DCD      0x40010c08
                  |L1.3192|
                          DCD      ||.constdata||+0x3e8
                  |L1.3196|
                          DCD      0x40000424
                  |L1.3200|
                          DCD      ||.bss||+0x168
                  |L1.3204|
                          DCD      ||.bss||+0x1168
                  |L1.3208|
                          DCD      0x40000800
                  |L1.3212|
                          DCD      0xe000ed08
                  |L1.3216|
                          DCD      ||.constdata||
                  |L1.3220|
                          DCD      0x40013800
                  |L1.3224|
                          DCD      0x05fa0004
                  |L1.3228|
000c9c  28d6              CMP      r0,#0xd6
000c9e  d118              BNE      |L1.3282|
;;;89        {
;;;90     	 i=0; ks=0; len-=sizeof(RSHDRE);	//    .
000ca0  2300              MOVS     r3,#0
000ca2  461d              MOV      r5,r3
000ca4  1f12              SUBS     r2,r2,#4
000ca6  4620              MOV      r0,r4
;;;91     	_ptr=ptr.uc;
;;;92         while (i<=len) ks+=ptr.uc[0], ptr.uc++, i++;	//  .
000ca8  e003              B        |L1.3250|
                  |L1.3242|
000caa  f8141b01          LDRB     r1,[r4],#1
000cae  1c5b              ADDS     r3,r3,#1
000cb0  440d              ADD      r5,r5,r1
                  |L1.3250|
000cb2  4293              CMP      r3,r2
000cb4  d9f9              BLS      |L1.3242|
;;;93         if (ks==(ptr.us)[0])
000cb6  8821              LDRH     r1,[r4,#0]
000cb8  42a9              CMP      r1,r5
000cba  d10a              BNE      |L1.3282|
;;;94         {
;;;95     	ptr.uc=_ptr; len-=(sizeof(RSHDRB)+4);	//     .  - .
;;;96      	ks=ptr.prsb->cid;			// ID .
000cbc  7843              LDRB     r3,[r0,#1]
000cbe  1f92              SUBS     r2,r2,#6              ;95
;;;97          if (ks<(sizeof(TabExecCMD))/4)		//  ?
000cc0  2b12              CMP      r3,#0x12
000cc2  d206              BCS      |L1.3282|
;;;98          {
;;;99     	ptr.uc+=sizeof(RSHDRB);			//    .
;;;100    	TabExecCMD[ks]				//   .  .
000cc4  4c36              LDR      r4,|L1.3488|
000cc6  1c80              ADDS     r0,r0,#2              ;99
000cc8  1d01              ADDS     r1,r0,#4
000cca  f8543023          LDR      r3,[r4,r3,LSL #2]
000cce  6800              LDR      r0,[r0,#0]
000cd0  4798              BLX      r3
                  |L1.3282|
;;;101    	(
;;;102    	ptr.ui[0],				//   .
;;;103    	ptr.ui+1,				//    .
;;;104    	len					//   .
;;;105    	);
;;;106          }
;;;107         }
;;;108        }
;;;109       }
;;;110      }
;;;111     if (i>=SIZEBUFRX) i=0;
000cd2  2e80              CMP      r6,#0x80
000cd4  d300              BCC      |L1.3288|
000cd6  2600              MOVS     r6,#0
                  |L1.3288|
;;;112    	return (i);
000cd8  4630              MOV      r0,r6
;;;113    }//______________________________________________
000cda  e5a4              B        |L1.2086|
;;;37     //#include "src\cmd.c"
                          ENDP

                  main PROC
;;;61     
;;;62     int main(){					//
000cdc  f7fffffe          BL       RemapToRAM
;;;63     uint i, rsst;
;;;64     puchar rxptr;
;;;65     	RemapToRAM();				//     RAM.
;;;66     
;;;67     	//     .
;;;68     
;;;69     	memcpy (&lcnfbuf,&tab_cnf, sizeof (CONFIG));//   .
000ce0  2240              MOVS     r2,#0x40
000ce2  4930              LDR      r1,|L1.3492|
000ce4  4830              LDR      r0,|L1.3496|
000ce6  f7fffffe          BL       __aeabi_memcpy4
;;;70     	
;;;71     	//    .
;;;72     	
;;;73     //	lbufinfo.pcnf=&lcnfbuf;
;;;74     //	lbufinfo.lbuf=lbuf0;
;;;75     //	lbufinfo.slbuf=SIZEBUFUNI;
;;;76     //	lbufinfo.verl=_VERSION;
;;;77     	VoltageMotor=MAX_PWM;			//    .
000cea  492f              LDR      r1,|L1.3496|
000cec  20ff              MOVS     r0,#0xff
000cee  3140              ADDS     r1,r1,#0x40
000cf0  7008              STRB     r0,[r1,#0]
;;;78     	ExecFlash=FlashLaser_1p;
000cf2  f2af5173          ADR      r1,FlashLaser_1p + 1
000cf6  482a              LDR      r0,|L1.3488|
000cf8  3870              SUBS     r0,r0,#0x70
;;;79     	ActBuffer=lbuf0;			//    .
000cfa  6481              STR      r1,[r0,#0x48]  ; ExecFlash
000cfc  492b              LDR      r1,|L1.3500|
;;;80     	Laser=0xFFFF;				//   .
000cfe  62c1              STR      r1,[r0,#0x2c]  ; ActBuffer
000d00  f64f71ff          MOV      r1,#0xffff
;;;81     	
;;;82     	RCC->APB2ENR|=	RCC_APB2ENR_AFIOEN|	//   .
000d04  6301              STR      r1,[r0,#0x30]  ; Laser
000d06  482a              LDR      r0,|L1.3504|
000d08  6981              LDR      r1,[r0,#0x18]
000d0a  f041010d          ORR      r1,r1,#0xd
000d0e  6181              STR      r1,[r0,#0x18]
;;;83     			RCC_APB2ENR_IOPAEN|	//   A.
;;;84     			RCC_APB2ENR_IOPBEN;     //   B.
;;;85     	SER_Init1();				//    1
000d10  f7fffffe          BL       SER_Init1
;;;86     	Init_TIM_PWM();				//    .
000d14  f7fffffe          BL       Init_TIM_PWM
;;;87     	MotorBreak();				// -.
000d18  f7fffffe          BL       MotorBreak
;;;88     	Init_TIM_TOT();				//   .
000d1c  f7fffffe          BL       Init_TIM_TOT
;;;89     	Init_TIM_ENC();				//  .
000d20  f7fffffe          BL       Init_TIM_ENC
;;;90     	InitPinsSteps();			//    .
000d24  f7fffffe          BL       InitPinsSteps
;;;91     	InitTimerSteps();			//   .
000d28  f7fffffe          BL       InitTimerSteps
;;;92     	InitLaserWRK();				//   .
000d2c  f7fffffe          BL       InitLaserWRK
;;;93     	LaserCTRL(0);				//  .
000d30  2000              MOVS     r0,#0
000d32  f7fffffe          BL       LaserCTRL
000d36  481f              LDR      r0,|L1.3508|
000d38  6801              LDR      r1,[r0,#0]
000d3a  f421417f          BIC      r1,r1,#0xff00
000d3e  6001              STR      r1,[r0,#0]
000d40  6801              LDR      r1,[r0,#0]
000d42  f4415108          ORR      r1,r1,#0x2200
000d46  6001              STR      r1,[r0,#0]
;;;94     	LEDS_Init();				//    .
;;;95     	
;;;96     //	printf ("\r\nExposer RAM ready\r\n>");
;;;97     	ACK();
000d48  f7fffffe          BL       ACK
;;;98     	i=0;
;;;99     	rxptr=RxBuf;
000d4c  4e16              LDR      r6,|L1.3496|
;;;100     while(1)
;;;101     {
;;;102    	rsst=USART1->SR;
000d4e  4d1a              LDR      r5,|L1.3512|
000d50  2000              MOVS     r0,#0                 ;98
000d52  3658              ADDS     r6,r6,#0x58           ;99
;;;103      if (rsst&USART_SR_RXNE)			//
;;;104     	i=CHECK_INPUT_BIN(i,rxptr,(uchar)USART1->DR&0xFF);	// 	i=SER_ReadChar();			//  .
000d54  1d2c              ADDS     r4,r5,#4
                  |L1.3414|
000d56  882a              LDRH     r2,[r5,#0]            ;102
000d58  0691              LSLS     r1,r2,#26             ;103
000d5a  d505              BPL      |L1.3432|
000d5c  8821              LDRH     r1,[r4,#0]
000d5e  b2ca              UXTB     r2,r1
000d60  4631              MOV      r1,r6
000d62  f7fffffe          BL       CHECK_INPUT_BIN
000d66  e7f6              B        |L1.3414|
                  |L1.3432|
;;;105      else if (rsst&0x1F) rsst=USART1->DR;
000d68  06d1              LSLS     r1,r2,#27
000d6a  d0f4              BEQ      |L1.3414|
000d6c  8821              LDRH     r1,[r4,#0]
000d6e  e7f2              B        |L1.3414|
;;;106     }
;;;107    }// ---------------------------------------------
                          ENDP

                  NVIC_EnableIRQ PROC
;;;1307    */
;;;1308   __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
000d70  f000021f          AND      r2,r0,#0x1f
;;;1309   {
;;;1310     NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
000d74  2101              MOVS     r1,#1
000d76  4091              LSLS     r1,r1,r2
000d78  0940              LSRS     r0,r0,#5
000d7a  f04f22e0          MOV      r2,#0xe000e000
000d7e  eb020080          ADD      r0,r2,r0,LSL #2
000d82  f8c01100          STR      r1,[r0,#0x100]
;;;1311   }
000d86  4770              BX       lr
;;;1312   
                          ENDP

                  NVIC_SetPriority PROC
;;;1389    */
;;;1390   __STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
000d88  0709              LSLS     r1,r1,#28
;;;1391   {
;;;1392     if(IRQn < 0) {
;;;1393       SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */
000d8a  0e09              LSRS     r1,r1,#24
000d8c  2800              CMP      r0,#0                 ;1392
000d8e  da03              BGE      |L1.3480|
000d90  f000000f          AND      r0,r0,#0xf
000d94  4a09              LDR      r2,|L1.3516|
000d96  e000              B        |L1.3482|
                  |L1.3480|
;;;1394     else {
;;;1395       NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */
000d98  4a09              LDR      r2,|L1.3520|
                  |L1.3482|
000d9a  5481              STRB     r1,[r0,r2]            ;1393
;;;1396   }
000d9c  4770              BX       lr
;;;1397   
                          ENDP

000d9e  0000              DCW      0x0000
                  |L1.3488|
                          DCD      ||.data||+0x70
                  |L1.3492|
                          DCD      ||.constdata||+0x428
                  |L1.3496|
                          DCD      ||.bss||+0x10
                  |L1.3500|
                          DCD      ||.bss||+0x168
                  |L1.3504|
                          DCD      0x40021000
                  |L1.3508|
                          DCD      0x40010c04
                  |L1.3512|
                          DCD      0x40013800
                  |L1.3516|
                          DCD      0xe000ed14
                  |L1.3520|
                          DCD      0xe000e400

                          AREA ||.bss||, DATA, NOINIT, ALIGN=2

                  lbufinfo
                          %        16
                  lcnfbuf
                          %        64
                  ldebinfo
                          %        24
                  RxBuf
                          %        256
                  lbuf0
                          %        4096
                  lbuf1
                          %        4096
                  ldbuf
                          %        2048

                          AREA ||.constdata||, DATA, READONLY, ALIGN=2

                  tab_mcu
                          DCD      lcnfbuf
                          DCD      lbuf0
                          DCD      lbufinfo
00000c  1000              DCW      0x1000
00000e  1f00              DCB      0x1f,0x00
                  StepTable
                          DCD      0x00000080
                          DCD      0x00000090
                          DCD      0x00000010
                          DCD      0x00000050
                          DCD      0x00000040
                          DCD      0x00000060
                          DCD      0x00000020
                          DCD      0x000000a0
                  AccelTable
                          DCD      0x0003ec75
                          DCD      0x000270ff
                          DCD      0x0001e413
                          DCD      0x0001966d
                          DCD      0x00016475
                          DCD      0x0001410e
                          DCD      0x00012630
                          DCD      0x0001110d
                          DCD      0x0000ffe9
                          DCD      0x0000f169
                          DCD      0x0000e536
                          DCD      0x0000da87
                          DCD      0x0000d16a
                          DCD      0x0000c92d
                          DCD      0x0000c1d3
                          DCD      0x0000bb3f
                          DCD      0x0000b554
                          DCD      0x0000afe3
                          DCD      0x0000aaf7
                          DCD      0x0000a66a
                          DCD      0x0000a231
                          DCD      0x00009e44
                          DCD      0x00009a9d
                          DCD      0x00009734
                          DCD      0x00009405
                          DCD      0x000090f8
                          DCD      0x00008e2f
                          DCD      0x00008b81
                          DCD      0x000088ec
                          DCD      0x00008690
                          DCD      0x00008449
                          DCD      0x00008224
                          DCD      0x00008011
                          DCD      0x00007e1d
                          DCD      0x00007c39
                          DCD      0x00007a70
                          DCD      0x000078b4
                          DCD      0x00007704
                          DCD      0x0000757a
                          DCD      0x000073ed
                          DCD      0x00007277
                          DCD      0x00007109
                          DCD      0x00006fb1
                          DCD      0x00006e60
                          DCD      0x00006d17
                          DCD      0x00006be0
                          DCD      0x00006ab1
                          DCD      0x00006987
                          DCD      0x0000686e
                          DCD      0x0000675b
                          DCD      0x0000664e
                          DCD      0x0000654f
                          DCD      0x0000644c
                          DCD      0x00006357
                          DCD      0x00006270
                          DCD      0x00006184
                          DCD      0x000060a5
                          DCD      0x00005fca
                          DCD      0x00005ef2
                          DCD      0x00005e1f
                          DCD      0x00005d57
                          DCD      0x00005c92
                          DCD      0x00005bd1
                          DCD      0x00005b13
                          DCD      0x00005a5f
                          DCD      0x000059a6
                          DCD      0x000058f8
                          DCD      0x0000584c
                          DCD      0x000057a3
                          DCD      0x00005704
                          DCD      0x00005660
                          DCD      0x000055c4
                          DCD      0x0000552b
                          DCD      0x00005495
                          DCD      0x00005400
                          DCD      0x0000536d
                          DCD      0x000052dc
                          DCD      0x00005254
                          DCD      0x000051cd
                          DCD      0x00005148
                          DCD      0x000050c4
                          DCD      0x00005042
                          DCD      0x00004fc2
                          DCD      0x00004f49
                          DCD      0x00004ecc
                          DCD      0x00004e56
                          DCD      0x00004de2
                          DCD      0x00004d6e
                          DCD      0x00004cfc
                          DCD      0x00004c8c
                          DCD      0x00004c22
                          DCD      0x00004bb3
                          DCD      0x00004b4c
                          DCD      0x00004ae0
                          DCD      0x00004a7a
                          DCD      0x00004a16
                          DCD      0x000049b2
                          DCD      0x00004950
                          DCD      0x000048ef
                          DCD      0x00004893
                          DCD      0x00004834
                          DCD      0x000047d5
                          DCD      0x0000477c
                          DCD      0x00004725
                          DCD      0x000046cd
                          DCD      0x00004673
                          DCD      0x0000461d
                          DCD      0x000045c9
                          DCD      0x00004579
                          DCD      0x00004526
                          DCD      0x000044d4
                          DCD      0x00004486
                          DCD      0x00004436
                          DCD      0x000043e5
                          DCD      0x0000439a
                          DCD      0x00004350
                          DCD      0x00004302
                          DCD      0x000042b8
                          DCD      0x00004270
                          DCD      0x00004228
                          DCD      0x000041e0
                          DCD      0x0000419d
                          DCD      0x00004157
                          DCD      0x00004111
                          DCD      0x000040d0
                          DCD      0x0000408c
                          DCD      0x00004048
                          DCD      0x00004008
                          DCD      0x00003fc9
                          DCD      0x00003f8a
                          DCD      0x00003f48
                          DCD      0x00003f0a
                          DCD      0x00003ecd
                          DCD      0x00003e90
                          DCD      0x00003e54
                          DCD      0x00003e1c
                          DCD      0x00003de0
                          DCD      0x00003da5
                          DCD      0x00003d6a
                          DCD      0x00003d34
                          DCD      0x00003cfa
                          DCD      0x00003cc4
                          DCD      0x00003c8b
                          DCD      0x00003c56
                          DCD      0x00003c21
                          DCD      0x00003be9
                          DCD      0x00003bb5
                          DCD      0x00003b81
                          DCD      0x00003b4e
                          DCD      0x00003b1b
                          DCD      0x00003ae8
                          DCD      0x00003ab6
                          DCD      0x00003a84
                          DCD      0x00003a52
                          DCD      0x00003a21
                          DCD      0x000039f3
                          DCD      0x000039c2
                          DCD      0x00003991
                          DCD      0x00003964
                          DCD      0x00003935
                          DCD      0x00003908
                          DCD      0x000038d9
                          DCD      0x000038ad
                          DCD      0x0000387e
                          DCD      0x00003853
                          DCD      0x00003827
                          DCD      0x000037fd
                          DCD      0x000037d2
                          DCD      0x000037a5
                          DCD      0x0000377a
                          DCD      0x00003751
                          DCD      0x00003727
                          DCD      0x000036fd
                          DCD      0x000036d4
                          DCD      0x000036ab
                          DCD      0x00003685
                          DCD      0x0000365d
                          DCD      0x00003635
                          DCD      0x0000360d
                          DCD      0x000035e8
                          DCD      0x000035c0
                          DCD      0x00003599
                          DCD      0x00003574
                          DCD      0x0000354d
                          DCD      0x00003529
                          DCD      0x00003503
                          DCD      0x000034df
                          DCD      0x000034bb
                          DCD      0x00003495
                          DCD      0x00003472
                          DCD      0x0000344f
                          DCD      0x0000342d
                          DCD      0x0000340a
                          DCD      0x000033e8
                          DCD      0x000033c5
                          DCD      0x000033a3
                          DCD      0x00003381
                          DCD      0x00003360
                          DCD      0x0000333e
                          DCD      0x0000331d
                          DCD      0x000032fb
                          DCD      0x000032da
                          DCD      0x000032ba
                          DCD      0x0000329b
                          DCD      0x0000327b
                          DCD      0x0000325a
                          DCD      0x0000323c
                          DCD      0x0000321c
                          DCD      0x000031ff
                          DCD      0x000031df
                          DCD      0x000031bf
                          DCD      0x000031a2
                          DCD      0x00003183
                          DCD      0x00003166
                          DCD      0x00003147
                          DCD      0x0000312a
                          DCD      0x0000310d
                          DCD      0x000030f1
                          DCD      0x000030d3
                          DCD      0x000030b6
                          DCD      0x0000309a
                          DCD      0x0000307e
                          DCD      0x00003063
                          DCD      0x00003047
                          DCD      0x0000302b
                          DCD      0x0000300e
                          DCD      0x00002ff3
                          DCD      0x00002fd8
                          DCD      0x00002fbd
                          DCD      0x00002fa2
                          DCD      0x00002f87
                          DCD      0x00002f6e
                          DCD      0x00002f54
                          DCD      0x00002f39
                          DCD      0x00002f1f
                          DCD      0x00002f05
                          DCD      0x00002eeb
                          DCD      0x00002ed3
                  tab_enc
0003e8  00000000          DCB      0x00,0x00,0x00,0x00
0003ec  0101ffff          DCB      0x01,0x01,0xff,0xff
0003f0  ffff0101          DCB      0xff,0xff,0x01,0x01
0003f4  00000000          DCB      0x00,0x00,0x00,0x00
0003f8  ff01ff01          DCB      0xff,0x01,0xff,0x01
0003fc  00000000          DCB      0x00,0x00,0x00,0x00
000400  00000000          DCB      0x00,0x00,0x00,0x00
000404  00000000          DCB      0x00,0x00,0x00,0x00
000408  01ff01ff          DCB      0x01,0xff,0x01,0xff
00040c  00000000          DCB      0x00,0x00,0x00,0x00
000410  00000000          DCB      0x00,0x00,0x00,0x00
000414  00000000          DCB      0x00,0x00,0x00,0x00
000418  00000000          DCB      0x00,0x00,0x00,0x00
00041c  00000000          DCB      0x00,0x00,0x00,0x00
000420  00000000          DCB      0x00,0x00,0x00,0x00
000424  00000000          DCB      0x00,0x00,0x00,0x00
                  tab_cnf
                          DCD      0x0000020d
                          DCD      0x00000007
                          DCD      0x00000001
                          DCD      0x000003e8
                          DCD      0x00000258
                          DCD      0x00006338
                          DCD      0x00000190
                          DCD      0x000003e8
                          DCD      0x00000190
                          DCD      0x00000bb8
000450  6cff0101          DCB      0x6c,0xff,0x01,0x01
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000

                          AREA ||.data||, DATA, ALIGN=2

                  DirX
000000  00                DCB      0x00
                  OffsPix
000001  00                DCB      0x00
                  CntPix
000002  00                DCB      0x00
                  DirY
000003  00                DCB      0x00
                  fStep
000004  00000000          DCB      0x00,0x00,0x00,0x00
                  SystemCoreClock
                          DCD      0x044aa200
                  indxmem
                          DCD      0x00000000
                  fDebug
                          DCD      0x00000000
                  SpeedMotor
                          DCD      0x00000000
                  i_value
                          DCD      0x00000000
                  d_value
                          DCD      0x00000000
                  CapNCCR
                          DCD      0x00000000
                  MaxPosEnc
                          DCD      0x00000000
                  LaserPos
                          DCD      0x00000000
                  ActBuffer
                          DCD      0x00000000
                  Laser
                          DCD      0x00000000
                  AccelPos
                          DCD      0x00000000
                  rSpeedY
                          DCD      0x00000000
                  cSpeedY
                          DCD      0x00000000
                  StepTOT
                          DCD      0x00000000
                  StepCNT
                          DCD      0x00000000
                  ExecFlash
                          DCD      0x00000000
                  ildb
                          DCD      0x00000000
                  AHBPrescTable
000050  00000000          DCB      0x00,0x00,0x00,0x00
000054  00000000          DCB      0x00,0x00,0x00,0x00
000058  01020304          DCB      0x01,0x02,0x03,0x04
00005c  06070809          DCB      0x06,0x07,0x08,0x09
                  TabExecFlash
                          DCD      FlashLaser_1p
                          DCD      FlashLaser_2p
                          DCD      FlashLaser_4p
                          DCD      FlashLaser_4p
                  TabExecCMD
                          DCD      EX_CMD_ACK
                          DCD      EX_CMD_INFO
                          DCD      EX_CMD_CONF
                          DCD      EX_CMD_BOOT
                          DCD      EX_CMD_READ
                          DCD      EX_CMD_WRITE
                          DCD      EX_CMD_MVS
                          DCD      EX_CMD_MVX
                          DCD      EX_CMD_MVY
                          DCD      EX_CMD_STX
                          DCD      EX_CMD_STY
                          DCD      EX_CMD_SPX
                          DCD      EX_CMD_SPY
                          DCD      EX_CMD_LSR
                          DCD      EX_CMD_LPTR
                          DCD      EX_CMD_AXSX
                          DCD      EX_CMD_AXSY
                          DCD      EX_CMD_DBG

                          AREA ||area_number.7||, DATA, ALIGN=2

                          EXPORTAS ||area_number.7||, ||.data||
                  p_value
                          DCD      0x00000000

                          AREA ||area_number.8||, DATA, ALIGN=2

                          EXPORTAS ||area_number.8||, ||.data||
                  WorkSTI
                          DCD      0x00000000

                          AREA ||area_number.9||, DATA, ALIGN=2

                          EXPORTAS ||area_number.9||, ||.data||
                  LastSTI
                          DCD      0x00000000

                          AREA ||area_number.10||, DATA, ALIGN=2

                          EXPORTAS ||area_number.10||, ||.data||
                  __stdout
                          DCD      0x00000000

                          AREA ||area_number.11||, DATA, ALIGN=2

                          EXPORTAS ||area_number.11||, ||.data||
                  __stdin
                          DCD      0x00000000

                          AREA ||area_number.12||, DATA, ALIGN=2

                          EXPORTAS ||area_number.12||, ||.data||
                  __stderr
                          DCD      0x00000000

;*** Start embedded assembler ***

#line 1 "hldi.c"
	AREA ||.rev16_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___6_hldi_c_5d646a67____REV16|
#line 115 "\\DEVELOP\\BIN\\Keil\\ARM\\CMSIS\\Include\\core_cmInstr.h"
|__asm___6_hldi_c_5d646a67____REV16| PROC
#line 116

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE, READONLY
	THUMB
	EXPORT |__asm___6_hldi_c_5d646a67____REVSH|
#line 130
|__asm___6_hldi_c_5d646a67____REVSH| PROC
#line 131

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

                  __ARM_use_no_argv EQU 0
