;CodeVisionAVR C Compiler V1.25.3 Evaluation ;(C) Copyright 1998-2007 Pavel Haiduc, HP InfoTech s.r.l. ;http://www.hpinfotech.com ;Chip type : ATtiny2313 ;Clock frequency : 4,000000 MHz ;Memory model : Tiny ;Optimize for : Size ;(s)printf features : int, width ;(s)scanf features : int, width ;External SRAM size : 0 ;Data Stack size : 64 byte(s) ;Heap size : 0 byte(s) ;Promote char to int : No ;char is unsigned : Yes ;8 bit enums : Yes ;Word align FLASH struct: No ;Enhanced core instructions : On ;Smart register allocation : On ;Automatic register allocation : On #pragma AVRPART ADMIN PART_NAME ATtiny2313 #pragma AVRPART MEMORY PROG_FLASH 2048 #pragma AVRPART MEMORY EEPROM 128 #pragma AVRPART MEMORY INT_SRAM SIZE 128 #pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60 .EQU UDRE=0x5 .EQU RXC=0x7 .EQU USR=0xB .EQU UDR=0xC .EQU EERE=0x0 .EQU EEWE=0x1 .EQU EEMWE=0x2 .EQU EECR=0x1C .EQU EEDR=0x1D .EQU EEARL=0x1E .EQU WDTCR=0x21 .EQU MCUSR=0x34 .EQU MCUCR=0x35 .EQU SPL=0x3D .EQU SREG=0x3F .EQU GPIOR0=0x13 .EQU GPIOR1=0x14 .EQU GPIOR2=0x15 .DEF R0X0=R0 .DEF R0X1=R1 .DEF R0X2=R2 .DEF R0X3=R3 .DEF R0X4=R4 .DEF R0X5=R5 .DEF R0X6=R6 .DEF R0X7=R7 .DEF R0X8=R8 .DEF R0X9=R9 .DEF R0XA=R10 .DEF R0XB=R11 .DEF R0XC=R12 .DEF R0XD=R13 .DEF R0XE=R14 .DEF R0XF=R15 .DEF R0X10=R16 .DEF R0X11=R17 .DEF R0X12=R18 .DEF R0X13=R19 .DEF R0X14=R20 .DEF R0X15=R21 .DEF R0X16=R22 .DEF R0X17=R23 .DEF R0X18=R24 .DEF R0X19=R25 .DEF R0X1A=R26 .DEF R0X1B=R27 .DEF R0X1C=R28 .DEF R0X1D=R29 .DEF R0X1E=R30 .DEF R0X1F=R31 .EQU __se_bit=0x20 .EQU __sm_mask=0x50 .EQU __sm_powerdown=0x10 .EQU __sm_standby=0x40 .MACRO __CPD1N CPI R30,LOW(@0) LDI R26,HIGH(@0) CPC R31,R26 LDI R26,BYTE3(@0) CPC R22,R26 LDI R26,BYTE4(@0) CPC R23,R26 .ENDM .MACRO __CPD2N CPI R26,LOW(@0) LDI R30,HIGH(@0) CPC R27,R30 LDI R30,BYTE3(@0) CPC R24,R30 LDI R30,BYTE4(@0) CPC R25,R30 .ENDM .MACRO __CPWRR CP R@0,R@2 CPC R@1,R@3 .ENDM .MACRO __CPWRN CPI R@0,LOW(@2) LDI R30,HIGH(@2) CPC R@1,R30 .ENDM .MACRO __ADDB1MN SUBI R30,LOW(-@0-(@1)) .ENDM .MACRO __ADDB2MN SUBI R26,LOW(-@0-(@1)) .ENDM .MACRO __ADDW1MN SUBI R30,LOW(-@0-(@1)) SBCI R31,HIGH(-@0-(@1)) .ENDM .MACRO __ADDW2MN SUBI R26,LOW(-@0-(@1)) SBCI R27,HIGH(-@0-(@1)) .ENDM .MACRO __ADDW1FN SUBI R30,LOW(-2*@0-(@1)) SBCI R31,HIGH(-2*@0-(@1)) .ENDM .MACRO __ADDD1FN SUBI R30,LOW(-2*@0-(@1)) SBCI R31,HIGH(-2*@0-(@1)) SBCI R22,BYTE3(-2*@0-(@1)) .ENDM .MACRO __ADDD1N SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) SBCI R22,BYTE3(-@0) SBCI R23,BYTE4(-@0) .ENDM .MACRO __ADDD2N SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) SBCI R24,BYTE3(-@0) SBCI R25,BYTE4(-@0) .ENDM .MACRO __SUBD1N SUBI R30,LOW(@0) SBCI R31,HIGH(@0) SBCI R22,BYTE3(@0) SBCI R23,BYTE4(@0) .ENDM .MACRO __SUBD2N SUBI R26,LOW(@0) SBCI R27,HIGH(@0) SBCI R24,BYTE3(@0) SBCI R25,BYTE4(@0) .ENDM .MACRO __ANDBMNN LDS R30,@0+@1 ANDI R30,LOW(@2) STS @0+@1,R30 .ENDM .MACRO __ANDWMNN LDS R30,@0+@1 ANDI R30,LOW(@2) STS @0+@1,R30 LDS R30,@0+@1+1 ANDI R30,HIGH(@2) STS @0+@1+1,R30 .ENDM .MACRO __ANDD1N ANDI R30,LOW(@0) ANDI R31,HIGH(@0) ANDI R22,BYTE3(@0) ANDI R23,BYTE4(@0) .ENDM .MACRO __ORBMNN LDS R30,@0+@1 ORI R30,LOW(@2) STS @0+@1,R30 .ENDM .MACRO __ORWMNN LDS R30,@0+@1 ORI R30,LOW(@2) STS @0+@1,R30 LDS R30,@0+@1+1 ORI R30,HIGH(@2) STS @0+@1+1,R30 .ENDM .MACRO __ORD1N ORI R30,LOW(@0) ORI R31,HIGH(@0) ORI R22,BYTE3(@0) ORI R23,BYTE4(@0) .ENDM .MACRO __DELAY_USB LDI R24,LOW(@0) __DELAY_USB_LOOP: DEC R24 BRNE __DELAY_USB_LOOP .ENDM .MACRO __DELAY_USW LDI R24,LOW(@0) LDI R25,HIGH(@0) __DELAY_USW_LOOP: SBIW R24,1 BRNE __DELAY_USW_LOOP .ENDM .MACRO __CLRD1S LDI R30,0 STD Y+@0,R30 STD Y+@0+1,R30 STD Y+@0+2,R30 STD Y+@0+3,R30 .ENDM .MACRO __GETD1S LDD R30,Y+@0 LDD R31,Y+@0+1 LDD R22,Y+@0+2 LDD R23,Y+@0+3 .ENDM .MACRO __PUTD1S STD Y+@0,R30 STD Y+@0+1,R31 STD Y+@0+2,R22 STD Y+@0+3,R23 .ENDM .MACRO __PUTD2S STD Y+@0,R26 STD Y+@0+1,R27 STD Y+@0+2,R24 STD Y+@0+3,R25 .ENDM .MACRO __POINTB1MN LDI R30,LOW(@0+@1) .ENDM .MACRO __POINTW1MN LDI R30,LOW(@0+@1) LDI R31,HIGH(@0+@1) .ENDM .MACRO __POINTD1M LDI R30,LOW(@0) LDI R31,HIGH(@0) LDI R22,BYTE3(@0) .ENDM .MACRO __POINTW1FN LDI R30,LOW(2*@0+@1) LDI R31,HIGH(2*@0+@1) .ENDM .MACRO __POINTD1FN LDI R30,LOW(2*@0+@1) LDI R31,HIGH(2*@0+@1) LDI R22,BYTE3(2*@0+@1) .ENDM .MACRO __POINTB2MN LDI R26,LOW(@0+@1) .ENDM .MACRO __POINTW2MN LDI R26,LOW(@0+@1) LDI R27,HIGH(@0+@1) .ENDM .MACRO __POINTBRM LDI R@0,LOW(@1) .ENDM .MACRO __POINTWRM LDI R@0,LOW(@2) LDI R@1,HIGH(@2) .ENDM .MACRO __POINTBRMN LDI R@0,LOW(@1+@2) .ENDM .MACRO __POINTWRMN LDI R@0,LOW(@2+@3) LDI R@1,HIGH(@2+@3) .ENDM .MACRO __POINTWRFN LDI R@0,LOW(@2*2+@3) LDI R@1,HIGH(@2*2+@3) .ENDM .MACRO __GETD1N LDI R30,LOW(@0) LDI R31,HIGH(@0) LDI R22,BYTE3(@0) LDI R23,BYTE4(@0) .ENDM .MACRO __GETD2N LDI R26,LOW(@0) LDI R27,HIGH(@0) LDI R24,BYTE3(@0) LDI R25,BYTE4(@0) .ENDM .MACRO __GETD2S LDD R26,Y+@0 LDD R27,Y+@0+1 LDD R24,Y+@0+2 LDD R25,Y+@0+3 .ENDM .MACRO __GETB1MN LDS R30,@0+@1 .ENDM .MACRO __GETB1HMN LDS R31,@0+@1 .ENDM .MACRO __GETW1MN LDS R30,@0+@1 LDS R31,@0+@1+1 .ENDM .MACRO __GETD1MN LDS R30,@0+@1 LDS R31,@0+@1+1 LDS R22,@0+@1+2 LDS R23,@0+@1+3 .ENDM .MACRO __GETBRMN LDS R@0,@1+@2 .ENDM .MACRO __GETWRMN LDS R@0,@2+@3 LDS R@1,@2+@3+1 .ENDM .MACRO __GETWRZ LDD R@0,Z+@2 LDD R@1,Z+@2+1 .ENDM .MACRO __GETD2Z LDD R26,Z+@0 LDD R27,Z+@0+1 LDD R24,Z+@0+2 LDD R25,Z+@0+3 .ENDM .MACRO __GETB2MN LDS R26,@0+@1 .ENDM .MACRO __GETW2MN LDS R26,@0+@1 LDS R27,@0+@1+1 .ENDM .MACRO __GETD2MN LDS R26,@0+@1 LDS R27,@0+@1+1 LDS R24,@0+@1+2 LDS R25,@0+@1+3 .ENDM .MACRO __PUTB1MN STS @0+@1,R30 .ENDM .MACRO __PUTW1MN STS @0+@1,R30 STS @0+@1+1,R31 .ENDM .MACRO __PUTD1MN STS @0+@1,R30 STS @0+@1+1,R31 STS @0+@1+2,R22 STS @0+@1+3,R23 .ENDM .MACRO __PUTBR0MN STS @0+@1,R0 .ENDM .MACRO __PUTDZ2 STD Z+@0,R26 STD Z+@0+1,R27 STD Z+@0+2,R24 STD Z+@0+3,R25 .ENDM .MACRO __PUTBMRN STS @0+@1,R@2 .ENDM .MACRO __PUTWMRN STS @0+@1,R@2 STS @0+@1+1,R@3 .ENDM .MACRO __PUTBZR STD Z+@1,R@0 .ENDM .MACRO __PUTWZR STD Z+@2,R@0 STD Z+@2+1,R@1 .ENDM .MACRO __GETW1R MOV R30,R@0 MOV R31,R@1 .ENDM .MACRO __GETW2R MOV R26,R@0 MOV R27,R@1 .ENDM .MACRO __GETWRN LDI R@0,LOW(@2) LDI R@1,HIGH(@2) .ENDM .MACRO __PUTW1R MOV R@0,R30 MOV R@1,R31 .ENDM .MACRO __PUTW2R MOV R@0,R26 MOV R@1,R27 .ENDM .MACRO __ADDWRN SUBI R@0,LOW(-@2) SBCI R@1,HIGH(-@2) .ENDM .MACRO __ADDWRR ADD R@0,R@2 ADC R@1,R@3 .ENDM .MACRO __SUBWRN SUBI R@0,LOW(@2) SBCI R@1,HIGH(@2) .ENDM .MACRO __SUBWRR SUB R@0,R@2 SBC R@1,R@3 .ENDM .MACRO __ANDWRN ANDI R@0,LOW(@2) ANDI R@1,HIGH(@2) .ENDM .MACRO __ANDWRR AND R@0,R@2 AND R@1,R@3 .ENDM .MACRO __ORWRN ORI R@0,LOW(@2) ORI R@1,HIGH(@2) .ENDM .MACRO __ORWRR OR R@0,R@2 OR R@1,R@3 .ENDM .MACRO __EORWRR EOR R@0,R@2 EOR R@1,R@3 .ENDM .MACRO __GETWRS LDD R@0,Y+@2 LDD R@1,Y+@2+1 .ENDM .MACRO __PUTWSR STD Y+@2,R@0 STD Y+@2+1,R@1 .ENDM .MACRO __MOVEWRR MOV R@0,R@2 MOV R@1,R@3 .ENDM .MACRO __INWR IN R@0,@2 IN R@1,@2+1 .ENDM .MACRO __OUTWR OUT @2+1,R@1 OUT @2,R@0 .ENDM .MACRO __CALL1MN LDS R30,@0+@1 LDS R31,@0+@1+1 ICALL .ENDM .MACRO __CALL1FN LDI R30,LOW(2*@0+@1) LDI R31,HIGH(2*@0+@1) RCALL __GETW1PF ICALL .ENDM .MACRO __CALL2EN LDI R26,LOW(@0+@1) LDI R27,HIGH(@0+@1) RCALL __EEPROMRDW ICALL .ENDM .MACRO __GETW1STACK IN R26,SPL IN R27,SPH ADIW R26,@0+1 LD R30,X+ LD R31,X .ENDM .MACRO __NBST BST R@0,@1 IN R30,SREG LDI R31,0x40 EOR R30,R31 OUT SREG,R30 .ENDM .MACRO __PUTB1SN LDD R26,Y+@0 SUBI R26,-@1 ST X,R30 .ENDM .MACRO __PUTW1SN LDD R26,Y+@0 SUBI R26,-@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SN LDD R26,Y+@0 SUBI R26,-@1 RCALL __PUTDP1 .ENDM .MACRO __PUTB1SNS LDD R26,Y+@0 SUBI R26,-@1 ST X,R30 .ENDM .MACRO __PUTW1SNS LDD R26,Y+@0 SUBI R26,-@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SNS LDD R26,Y+@0 SUBI R26,-@1 RCALL __PUTDP1 .ENDM .MACRO __PUTB1RN MOV R26,R@0 SUBI R26,-@1 ST X,R30 .ENDM .MACRO __PUTW1RN MOV R26,R@0 SUBI R26,-@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RN MOV R26,R@0 SUBI R26,-@1 RCALL __PUTDP1 .ENDM .MACRO __PUTB1RNS MOV R26,R@0 SUBI R26,-@1 ST X,R30 .ENDM .MACRO __PUTW1RNS MOV R26,R@0 SUBI R26,-@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1RNS MOV R26,R@0 SUBI R26,-@1 RCALL __PUTDP1 .ENDM .MACRO __PUTB1PMN LDS R26,@0 SUBI R26,-@1 ST X,R30 .ENDM .MACRO __PUTW1PMN LDS R26,@0 SUBI R26,-@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1PMN LDS R26,@0 SUBI R26,-@1 RCALL __PUTDP1 .ENDM .MACRO __PUTB1PMNS LDS R26,@0 SUBI R26,-@1 ST X,R30 .ENDM .MACRO __PUTW1PMNS LDS R26,@0 SUBI R26,-@1 ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1PMNS LDS R26,@0 SUBI R26,-@1 RCALL __PUTDP1 .ENDM .MACRO __GETB1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R30,Z .ENDM .MACRO __GETB1HSX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R31,Z .ENDM .MACRO __GETW1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R0,Z+ LD R31,Z MOV R30,R0 .ENDM .MACRO __GETD1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R0,Z+ LD R1,Z+ LD R22,Z+ LD R23,Z MOVW R30,R0 .ENDM .MACRO __GETB2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R26,X .ENDM .MACRO __GETW2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 .ENDM .MACRO __GETD2SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R1,X+ LD R24,X+ LD R25,X MOVW R26,R0 .ENDM .MACRO __GETBRSX MOVW R30,R28 SUBI R30,LOW(-@1) SBCI R31,HIGH(-@1) LD R@0,Z .ENDM .MACRO __GETWRSX MOVW R30,R28 SUBI R30,LOW(-@2) SBCI R31,HIGH(-@2) LD R@0,Z+ LD R@1,Z .ENDM .MACRO __LSLW8SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) LD R31,Z CLR R30 .ENDM .MACRO __PUTB1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X,R30 .ENDM .MACRO __PUTW1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) ST X+,R30 ST X+,R31 ST X+,R22 ST X,R23 .ENDM .MACRO __CLRW1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) CLR R0 ST Z+,R0 ST Z,R0 .ENDM .MACRO __CLRD1SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) CLR R0 ST Z+,R0 ST Z+,R0 ST Z+,R0 ST Z,R0 .ENDM .MACRO __PUTB2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z,R26 .ENDM .MACRO __PUTW2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z+,R26 ST Z,R27 .ENDM .MACRO __PUTD2SX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z+,R26 ST Z+,R27 ST Z+,R24 ST Z,R25 .ENDM .MACRO __PUTBSRX MOVW R30,R28 SUBI R30,LOW(-@0) SBCI R31,HIGH(-@0) ST Z,R@1 .ENDM .MACRO __PUTWSRX MOVW R30,R28 SUBI R30,LOW(-@2) SBCI R31,HIGH(-@2) ST Z+,R@0 ST Z,R@1 .ENDM .MACRO __PUTB1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X,R30 .ENDM .MACRO __PUTW1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X,R31 .ENDM .MACRO __PUTD1SNX MOVW R26,R28 SUBI R26,LOW(-@0) SBCI R27,HIGH(-@0) LD R0,X+ LD R27,X MOV R26,R0 SUBI R26,LOW(-@1) SBCI R27,HIGH(-@1) ST X+,R30 ST X+,R31 ST X+,R22 ST X,R23 .ENDM .CSEG .ORG 0 .INCLUDE "Main.vec" .INCLUDE "Main.inc" __RESET: CLI CLR R30 OUT EECR,R30 OUT MCUCR,R30 ;DISABLE WATCHDOG LDI R31,0x18 IN R26,MCUSR CBR R26,8 OUT MCUSR,R26 OUT WDTCR,R31 OUT WDTCR,R30 ;CLEAR R2-R14 LDI R24,13 LDI R26,2 __CLEAR_REG: ST X+,R30 DEC R24 BRNE __CLEAR_REG ;CLEAR SRAM LDI R24,LOW(0x80) LDI R26,0x60 __CLEAR_SRAM: ST X+,R30 DEC R24 BRNE __CLEAR_SRAM ;GLOBAL VARIABLES INITIALIZATION LDI R30,LOW(__GLOBAL_INI_TBL*2) LDI R31,HIGH(__GLOBAL_INI_TBL*2) __GLOBAL_INI_NEXT: LPM R24,Z+ LPM R25,Z+ SBIW R24,0 BREQ __GLOBAL_INI_END LPM R26,Z+ LPM R27,Z+ LPM R0,Z+ LPM R1,Z+ MOVW R22,R30 MOVW R30,R0 __GLOBAL_INI_LOOP: LPM R0,Z+ ST X+,R0 SBIW R24,1 BRNE __GLOBAL_INI_LOOP MOVW R30,R22 RJMP __GLOBAL_INI_NEXT __GLOBAL_INI_END: ;GPIOR0-GPIOR2 INITIALIZATION LDI R30,__GPIOR0_INIT OUT GPIOR0,R30 LDI R30,__GPIOR1_INIT OUT GPIOR1,R30 LDI R30,__GPIOR2_INIT OUT GPIOR2,R30 ;STACK POINTER INITIALIZATION LDI R30,LOW(0xDF) OUT SPL,R30 ;DATA STACK POINTER INITIALIZATION LDI R28,LOW(0xA0) LDI R29,HIGH(0xA0) RJMP _main .ESEG .ORG 0 .DSEG .ORG 0xA0 ; 1 /***************************************************** ; 2 This program was produced by the ; 3 CodeWizardAVR V1.25.3 Evaluation ; 4 Automatic Program Generator ; 5 © Copyright 1998-2007 Pavel Haiduc, HP InfoTech s.r.l. ; 6 http://www.hpinfotech.com ; 7 ; 8 Project : ; 9 Version : ; 10 Date : 07.05.2007 ; 11 Author : Freeware, for evaluation and non-commercial use only ; 12 Company : ; 13 Comments: ; 14 ; 15 ; 16 Chip type : ATtiny2313 ; 17 Clock frequency : 4,000000 MHz ; 18 Memory model : Tiny ; 19 External SRAM size : 0 ; 20 Data Stack size : 32 ; 21 *****************************************************/ ; 22 ; 23 #include ; 24 #include ; 25 ; 26 // Declare your global variables here ; 27 ; 28 void main(void) ; 29 { .CSEG _main: ; 30 unsigned char i, j; ; 31 int spd=200; ; 32 bit flag=1, flag1=1, flag2=1; ; 33 // Declare your local variables here ; 34 ; 35 // Crystal Oscillator division factor: 1 ; 36 #pragma optsize- ; 37 CLKPR=0x80; ; i -> R17 ; j -> R16 ; spd -> R18,R19 ; flag -> R15.0 ; flag1 -> R15.1 ; flag2 -> R15.2 LDI R30,LOW(7) MOV R15,R30 LDI R18,200 LDI R19,0 LDI R30,LOW(128) OUT 0x26,R30 ; 38 CLKPR=0x00; LDI R30,LOW(0) OUT 0x26,R30 ; 39 #ifdef _OPTIMIZE_SIZE_ ; 40 #pragma optsize+ ; 41 #endif ; 42 ; 43 // Input/Output Ports initialization ; 44 // Port A initiali/zation ; 45 // Func2=In Func1=In Func0=In ; 46 // State2=T State1=T State0=T ; 47 PORTA=0x00; OUT 0x1B,R30 ; 48 DDRA=0x00; OUT 0x1A,R30 ; 49 ; 50 // Port B initialization ; 51 // Func7=Out Func6=Out Func5=Out Func4=Out Func3=Out Func2=Out Func1=Out Func0=Out ; 52 // State7=0 State6=0 State5=0 State4=0 State3=0 State2=0 State1=1 State0=0 ; 53 PORTB=0x00; OUT 0x18,R30 ; 54 DDRB=0xFF; LDI R30,LOW(255) OUT 0x17,R30 ; 55 ; 56 // Port D initialization ; 57 // Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In ; 58 // State6=T State5=T State4=T State3=T State2=T State1=T State0=T ; 59 PORTD=0x7F; LDI R30,LOW(127) OUT 0x12,R30 ; 60 DDRD=0x00; LDI R30,LOW(0) OUT 0x11,R30 ; 61 ; 62 ; 63 // Timer/Counter 0 initialization ; 64 // Clock source: System Clock ; 65 // Clock value: Timer 0 Stopped ; 66 // Mode: Normal top=FFh ; 67 // OC0A output: Disconnected ; 68 // OC0B output: Disconnected ; 69 TCCR0A=0x00; OUT 0x30,R30 ; 70 TCCR0B=0x00; OUT 0x33,R30 ; 71 TCNT0=0x00; OUT 0x32,R30 ; 72 OCR0A=0x00; OUT 0x36,R30 ; 73 OCR0B=0x00; OUT 0x3C,R30 ; 74 ; 75 // Timer/Counter 1 initialization ; 76 // Clock source: System Clock ; 77 // Clock value: Timer 1 Stopped ; 78 // Mode: Normal top=FFFFh ; 79 // OC1A output: Discon. ; 80 // OC1B output: Discon. ; 81 // Noise Canceler: Off ; 82 // Input Capture on Falling Edge ; 83 // Timer 1 Overflow Interrupt: Off ; 84 // Input Capture Interrupt: Off ; 85 // Compare A Match Interrupt: Off ; 86 // Compare B Match Interrupt: Off ; 87 TCCR1A=0x00; OUT 0x2F,R30 ; 88 TCCR1B=0x00; OUT 0x2E,R30 ; 89 TCNT1H=0x00; OUT 0x2D,R30 ; 90 TCNT1L=0x00; OUT 0x2C,R30 ; 91 ICR1H=0x00; OUT 0x25,R30 ; 92 ICR1L=0x00; OUT 0x24,R30 ; 93 OCR1AH=0x00; OUT 0x2B,R30 ; 94 OCR1AL=0x00; OUT 0x2A,R30 ; 95 OCR1BH=0x00; OUT 0x29,R30 ; 96 OCR1BL=0x00; OUT 0x28,R30 ; 97 ; 98 // External Interrupt(s) initialization ; 99 // INT0: Off ; 100 // INT1: Off ; 101 // Interrupt on any change on pins PCINT0-7: Off ; 102 GIMSK=0x00; OUT 0x3B,R30 ; 103 MCUCR=0x00; OUT 0x35,R30 ; 104 ; 105 // Timer(s)/Counter(s) Interrupt(s) initialization ; 106 TIMSK=0x00; OUT 0x39,R30 ; 107 ; 108 // Universal Serial Interface initialization ; 109 // Mode: Disabled ; 110 // Clock source: Register & Counter=no clk. ; 111 // USI Counter Overflow Interrupt: Off ; 112 USICR=0x00; OUT 0xD,R30 ; 113 ; 114 // Analog Comparator initialization ; 115 // Analog Comparator: Off ; 116 // Analog Comparator Input Capture by Timer/Counter 1: Off ; 117 ACSR=0x80; LDI R30,LOW(128) OUT 0x8,R30 ; 118 ; 119 ; 120 while (1) _0x3: ; 121 { ; 122 ; 123 unsigned char mode[8][8]={{129,66,36,24,24,36,66,129}, ; 124 {129,195,231,255,255,231,195,129}, ; 125 {1,2,4,8,16,32,64,128}, ; 126 {128,64,32,16,8,4,2,1}, ; 127 {129,24,66,36,36,66,24,129}, ; 128 {160,80,40,20,10,5,2,1}, ; 129 {5,10,20,40,80,160,64,128}, ; 130 {136,68,34,17,17,34,68,136}}; ; 131 //Rascommentirovat dlya perekly4enija ot knopki ; 132 if ((PIND.0==0) && (flag==1)) SBIW R28,63 SBIW R28,1 LDI R24,64 LDI R26,LOW(0) LDI R27,HIGH(0) LDI R30,LOW(_0x6*2) LDI R31,HIGH(_0x6*2) RCALL __INITLOCB ; flag -> R15.0 ; flag1 -> R15.1 ; flag2 -> R15.2 ; mode -> Y+0 SBIC 0x10,0 RJMP _0x8 SBRC R15,0 RJMP _0x9 _0x8: RJMP _0x7 _0x9: ; 133 { ; 134 i++; ; flag -> R15.0 ; flag1 -> R15.1 ; flag2 -> R15.2 ; mode -> Y+0 SUBI R17,-1 ; 135 if (i>7) i=0; CPI R17,8 BRLO _0xA LDI R17,LOW(0) ; 136 flag=0; _0xA: CLT BLD R15,0 ; 137 } ; 138 if (PIND.0==1) flag=1; _0x7: SBIS 0x10,0 RJMP _0xB SET BLD R15,0 ; 139 j++; _0xB: SUBI R16,-1 ; 140 if (j>7) CPI R16,8 BRLO _0xC ; 141 { ; 142 j=0; ; flag -> R15.0 ; flag1 -> R15.1 ; flag2 -> R15.2 ; mode -> Y+0 LDI R16,LOW(0) ; 143 //Raskomentirovat dlya avtomati4eskogo pereklu4eniya ; 144 //i++; ; 145 //if (i>7) ; 146 //{ ; 147 // i=0; ; 148 //} ; 149 } ; 150 PORTB=mode[i][j]; _0xC: MOV R30,R17 LSL R30 LSL R30 LSL R30 MOV R26,R28 ADD R30,R26 ADD R30,R16 LD R30,Z OUT 0x18,R30 ; 151 if ((PIND.1==0) && (flag1==1)) SBIC 0x10,1 RJMP _0xE SBRC R15,1 RJMP _0xF _0xE: RJMP _0xD _0xF: ; 152 { ; 153 spd++; ; flag -> R15.0 ; flag1 -> R15.1 ; flag2 -> R15.2 ; mode -> Y+0 __ADDWRN 18,19,1 ; 154 }; _0xD: ; 155 if (PIND.1==1) flag1=1; SBIS 0x10,1 RJMP _0x10 SET BLD R15,1 ; 156 ; 157 if ((PIND.2==0) && (flag2==1)) _0x10: SBIC 0x10,2 RJMP _0x12 SBRC R15,2 RJMP _0x13 _0x12: RJMP _0x11 _0x13: ; 158 { ; 159 spd--; ; flag -> R15.0 ; flag1 -> R15.1 ; flag2 -> R15.2 ; mode -> Y+0 __SUBWRN 18,19,1 ; 160 }; _0x11: ; 161 if (PIND.2==1) flag2=1; SBIS 0x10,2 RJMP _0x14 SET BLD R15,2 ; 162 ; 163 // delay_ms(spd); ; 164 }; _0x14: ADIW R28,63 ADIW R28,1 RJMP _0x3 ; 165 } _0x15: RJMP _0x15 __INITLOCB: __INITLOCW: ADD R26,R28 __INITLOC0: LPM R0,Z+ ST X+,R0 DEC R24 BRNE __INITLOC0 RET ;END OF CODE MARKER __END_OF_CODE: