void SPI_RFM_INIT (void)
{
   reset();

   SPI_WRITE(0x06, 0x00); // interrupt all disable
   SPI_WRITE(0x07, 01); // to ready mode
   SPI_WRITE(0x09, 0x7f); // cap = 12.5pf
   SPI_WRITE(0x0a, 0x05); //clk output is 2MHz
   SPI_WRITE(0x0C,0b00010111);     // GPIO Configuration 0.
   SPI_WRITE(0x0B,0b00011000);     // GPIO Configuration 1.
   SPI_WRITE(0x0d, 0x00); // GPIO2 for MCLK output
   SPI_WRITE(0x0e, 0x00); //GPIO port use default value
   SPI_WRITE(0x0f, 0x70); // NO ADC used
   SPI_WRITE(0x10, 0x00); //no adc used
   SPI_WRITE(0x12, 0x00); // no temperature sensor used
   SPI_WRITE(0x13, 0x00); // no temperature sensor used
   SPI_WRITE(0x70, 0x2C); // no mancheset code, no data whiting, data rate < 30Kbps
   SPI_WRITE(0x1c, 0x1E); // IF filter bandwidth
   SPI_WRITE(0x1d, 0x3c); // AFC LOOP
   SPI_WRITE(0x1e, 0x02); //AFC timing
   SPI_WRITE(0x20, 0xD0); //clock recovery
   SPI_WRITE(0x21, 0x00); //clock recovery
   SPI_WRITE(0x22, 0x9D); //clock recovery
   SPI_WRITE(0x23, 0x49); //clock recovery
   SPI_WRITE(0x24, 0x00); //clock recovery timing
   SPI_WRITE(0x25, 0x45); //clock recovery timing
   SPI_WRITE(0x6e, 0x4E); // Tx data rate 1 //27
   SPI_WRITE(0x6f, 0xA5); // Tx data rate 0 //52
   SPI_WRITE(0x30, 0x8c); // data access control
   SPI_WRITE(0x32, 0xff); // header control
   SPI_WRITE(0x33, 0x42);// // header 3, 2, 1,0 used for head length, fixed packet length, synchronize word length 3, 2,
   SPI_WRITE(0x34, 64); // 64 nibble = 32byte preamble
   SPI_WRITE(0x35, 0x20); //0x35 need to detect 20bit preamble
   SPI_WRITE(0x36, 0x2d); // synchronize word
   SPI_WRITE(0x37, 0xd4);
   SPI_WRITE(0x38, 0x00);
   SPI_WRITE(0x39, 0x00);
   SPI_WRITE(0x3a, 's'); //transmit header 3
   SPI_WRITE(0x3b, 'o');
   SPI_WRITE(0x3c, 'n');
   SPI_WRITE(0x3d, 'g');
   SPI_WRITE(0x3e, TX_buff_lenght);     // total tx 1 byte
   SPI_WRITE(0x3f, 's'); //check header 3
   SPI_WRITE(0x40, 'o');
   SPI_WRITE(0x41, 'n');
   SPI_WRITE(0x42, 'g');
   SPI_WRITE(0x43, 0xff); // all the bit to be checked
   SPI_WRITE(0x44, 0xff); // all the bit to be checked
   SPI_WRITE(0x45, 0xff); // all the bit to be checked
   SPI_WRITE(0x46, 0xff); // all the bit to be checked
   SPI_WRITE(0x6d, 0x07); // tx power to max
   SPI_WRITE(0x79, 0x0); // no frequency hopping
   SPI_WRITE(0x7a, 0x0); // no frequency hopping
   SPI_WRITE(0x71, 0x23); // Gfsk, fd[8] =0, no invert for Tx/Rx data, fifo mode, txclk -->gpio
   SPI_WRITE(0x72, 0x48); // frequency deviation setting to 45k = 72*625
   SPI_WRITE(0x73, 0x0); // no frequency offset
   SPI_WRITE(0x74, 0x0); // no frequency offset
   SPI_WRITE(0x75, 0x53); // frequency set to 434MHz
   SPI_WRITE(0x76, 0x4B); // frequency set to 434MHz
   SPI_WRITE(0x77, 0x00);// frequency set to 434MHz
   
   SPI_WRITE(0x2a, 0xff);
   SPI_WRITE(0x1f, 0x03);
   SPI_WRITE(0x69, 0x60);

   SPI_WRITE(0x08, 0x03); // fifo reset
   SPI_WRITE(0x08, 0x00);

   SPI_WRITE(0x05, 0x06); // interrupt on recieve packet, Enable Packet Sent
   
}