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  	RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // adc clock
	ADC1->CR1 = ADC_CR1_EOCIE; // end of conversion irq
	ADC1->CR2 = ADC_CR2_ADON;
	ADC1->CR2 |= ADC_CR2_EXTTRIG; // extsel=000= tim1 cc event
	ADC1->SQR1 = 0; // sequence len=1
	ADC1->SQR2 = 0;
	ADC1->SQR3 = 1; // ADC_IN1
	NVIC_EnableIRQ( ADC1_IRQn );
	
	RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // timer clock	
	TIM1->CR1 = TIM_CR1_URS;
	TIM1->CCR1 = 0;
	TIM1->CNT = 0;              
	TIM1->PSC = 0;    
	TIM1->ARR = SYS_CLK/1000;   // interval = 1ms
	TIM1->EGR = TIM_EGR_UG;     // update registers
	TIM1->SR = 0;
	TIM1->CR1 |= TIM_CR1_CEN;   // start

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  RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
	ADC1->CR1 = ADC_CR1_JEOCIE;    // injected end of conversion IRQ
	ADC1->CR2 |= ADC_CR2_JEXTTRIG;// JEXTSEL=000=TIM1_TRGO
	ADC1->JSQR = ADC_JSQR_JSQ4_0;//JL=0(1conversion), ch ADC_IN1
	NVIC_EnableIRQ( ADC1_IRQn );
	
	RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;	
	TIM1->CR1 = TIM_CR1_URS;
	TIM1->CR2 = TIM_CR2_MMS_1 | TIM_CR2_MMS_0; // TRGO compare CC1IF
	TIM1->CCR1 = 0;
	TIM1->CNT = 0;               // timebase
	TIM1->PSC = 0;    
	TIM1->ARR = SYS_CLK/1000;   // interval = 1ms
	TIM1->EGR = TIM_EGR_UG;     // update registers
	TIM1->SR = 0;
	TIM1->CR1 |= TIM_CR1_CEN;   // start

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In order to make the program work, you must do the following :
- Copy all source files from this example folder to the template folder under   Project\STM32F0xx_StdPeriph_Templates
- Open your preferred toolchain
- Select the appropriate workspace

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- Rebuild all files and load your image into target memory

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 #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"

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- Run the example

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void EXTI0_IRQHandler(void)
   {
			//switch (doublestep) {
				//case 0:
					//switch (step) {
						//case 0:
							

//						case 1:
	//					TIM14->CR1 &= TIM_CR1_CEN;
		//		      switch (dir) {
			//		 	   case 0:
				//			  TIM16->CCR1 = 0x0000; break;
					//	   case 1: 
						//	  TIM16->CCR1 = 0xFFFF; break;
						  // default:
							  //doublestep = 1;
							    //      }
										//	   ;}
			
					//TIM14->CR1 &= TIM_CR1_CEN;
				   switch (GPIOA->IDR & GPIO_IDR_1) {
						 case 0:
							 TIM16->CCR1 = 0x0000; break;
						 case 1: 
							 TIM16->CCR1 = 0xFFFF; break;
						 default:
							          ;}						       	
												
     EXTI->PR |= EXTI_PR_PR0; 
   }

void EXTI2_IRQHandler(void)
   {
     TIM16->CCR1 = 500;
     EXTI->PR |= EXTI_PR_PR2;
   }

int main()
{

  NVIC_EnableIRQ(TIM14_IRQn); 
	NVIC_EnableIRQ(EXTI0_1_IRQn);
	NVIC_EnableIRQ(EXTI2_3_IRQn);
	NVIC_SetPriority(TIM14_IRQn, 3);	
	NVIC_SetPriority(EXTI0_1_IRQn, 2);
	NVIC_SetPriority(EXTI2_3_IRQn, 1);

		
	RCC->AHBENR |= (RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOAEN);
	//RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
	RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
	RCC->APB1ENR |= RCC_APB1ENR_TIM14EN;
	RCC->APB2ENR |= RCC_APB2ENR_TIM16EN;
	RCC->APB2ENR |= RCC_APB2ENR_SYSCFGCOMPEN;
		
	GPIOA->MODER |= GPIO_MODER_MODER14_1 | GPIO_MODER_MODER13_1 | GPIO_MODER_MODER6_1 | GPIO_MODER_MODER2_0;
	GPIOB->MODER |= GPIO_MODER_MODER6_1;
	GPIOA->AFR[0] |= 0x05000000;
	GPIOB->AFR[0] |= 0x02000000;
	//GPIOA->OTYPER = 0x00000000;
	//GPIOB->OTYPER = 0x00000000;
	GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEEDR0 | GPIO_OSPEEDR_OSPEEDR1 | GPIO_OSPEEDR_OSPEEDR2 | GPIO_OSPEEDR_OSPEEDR3 | GPIO_OSPEEDR_OSPEEDR6;
	GPIOB->OSPEEDR |= GPIO_OSPEEDR_OSPEEDR0 | GPIO_OSPEEDR_OSPEEDR1 | GPIO_OSPEEDR_OSPEEDR6;
	GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_0 | GPIO_PUPDR_PUPDR2_0;
	
	SYSCFG->EXTICR[1] |= SYSCFG_EXTICR1_EXTI0_PA | SYSCFG_EXTICR1_EXTI2_PA;
	EXTI->IMR |= EXTI_IMR_MR0 | EXTI_IMR_MR2;
	EXTI->RTSR |= EXTI_RTSR_TR2;
	EXTI->FTSR |= EXTI_FTSR_TR0 | EXTI_FTSR_TR2;