Код: Выделить всё
#include "stm32f4xx.h"
#define PLL_M 25
#define PLL_N 336
#define PLL_P 4
#define PLL_Q 7
#define LED_TOGGLE (GPIOC->ODR ^= GPIO_ODR_ODR_13)
#define RCC_PLLCFGR_PLLP_DIV4 (0x1U << RCC_PLLCFGR_PLLP_Pos)
#define RCC_CFGR_MCO2_HSE (0x2U << RCC_CFGR_MCO2_Pos)
#define RCC_CFGR_MCO2PRE_DIV1 (0x0U << RCC_CFGR_MCO2PRE_Pos)
#define RCC_CFGR_MCO1PRE_DIV1 (0x0U << RCC_CFGR_MCO1PRE_Pos)
#define RCC_CFGR_I2SSRC_PLLI2S (0x0U << RCC_CFGR_I2SSRC_Pos)
#define RCC_CFGR_MCO1_HSE (0x2U << RCC_CFGR_MCO1_Pos)
void LED_PC13_init(){
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
GPIOC->MODER |= GPIO_MODER_MODER13_0;
}
void TIM3_init(){
NVIC_DisableIRQ(TIM3_IRQn);
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
TIM3->CR1 |= TIM_CR1_CEN;
TIM3->CR1 |= TIM_CR1_ARPE;
TIM3->DIER |= TIM_DIER_UIE;
TIM3->EGR |= TIM_EGR_UG;
TIM3->SR &= ~TIM_SR_UIF;
TIM3->CNT = 0;
TIM3->PSC = 83999;
TIM3->ARR = 999;
NVIC_SetPriority(TIM3_IRQn,8);
NVIC_EnableIRQ(TIM3_IRQn);
}
void TIM3_IRQHandler(){
TIM3->SR =~0x01;
LED_TOGGLE;
}
static void SystemClock_Config(){
FLASH->ACR = FLASH_ACR_PRFTEN |
FLASH_ACR_ICEN |
FLASH_ACR_DCEN |
FLASH_ACR_LATENCY_3WS;
RCC->CR = _VAL2FLD(RCC_CR_HSITRIM,16) |
RCC_CR_HSION |
RCC_CR_HSEON;
while(!(RCC->CR & RCC_CR_HSERDY));
RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLM_Msk |
RCC_PLLCFGR_PLLN_Msk |
RCC_PLLCFGR_PLLP_Msk);
RCC->PLLCFGR = RCC_PLLCFGR_PLLSRC_HSE |
_VAL2FLD(RCC_PLLCFGR_PLLQ,7) |
_VAL2FLD(RCC_PLLCFGR_PLLN,336) |
_VAL2FLD(RCC_PLLCFGR_PLLM,25) |
//_VAL2FLD(RCC_PLLCFGR_PLLP,1);
RCC_PLLCFGR_PLLP_DIV4;
RCC->CR = _VAL2FLD(RCC_CR_HSITRIM,16) |
RCC_CR_HSION |
RCC_CR_HSEON |
RCC_CR_PLLON;
while(!(RCC->CR & RCC_CR_PLLRDY));
RCC->CFGR = RCC_CFGR_MCO2_HSE |
RCC_CFGR_MCO2PRE_DIV1 |
RCC_CFGR_MCO1PRE_DIV1 |
RCC_CFGR_I2SSRC_PLLI2S |
RCC_CFGR_MCO1_HSE |
_VAL2FLD(RCC_CFGR_RTCPRE,8) |
RCC_CFGR_PPRE2_DIV1 |
RCC_CFGR_PPRE1_DIV2 |
RCC_CFGR_HPRE_DIV1 |
RCC_CFGR_SW_PLL;
RCC->CR = _VAL2FLD(RCC_CR_HSITRIM,16) |
RCC_CR_HSEON |
RCC_CR_PLLON;
SystemCoreClockUpdate();
}
int main(){
SystemClock_Config();
LED_PC13_init();
TIM3_init();
while(1){
}
}