LIBRARY ieee;
  USE ieee.std_logic_1164.ALL;
---------- --
    Entity PS2SIMPL is
---------- --
      Port ( Clk      : In  std_logic;
             Reset    : In  std_logic;
             D7SEG_L : Out std_logic_vector (0 to 6);
          D7SEG_H  : Out std_logic_vector (0 to 6);
          D7SEG_2  : Out std_logic_vector (0 to 6);
             D7SEG_3  : Out std_logic_vector (0 to 6);
             PS2_Data : In  std_logic;
             PS2_Clk  : In  std_logic;
             nLED     : Out std_logic );
end PS2SIMPL;
---------- --
    Architecture SCHEMATIC of PS2SIMPL is
---------- --
  component SEVENSEG
     port(data_in: in std_logic_vector (3 downto 0);
      
      data_out: out std_logic_vector (6 downto 0));
  end component;
  component PS2_CTRL
  Generic ( FILTERSIZE : POSITIVE := 8 );
     Port (     Clk : in  std_logic;
             DoRead : in  std_logic;
            PS2_Clk : in  std_logic;
           PS2_Data : in  std_logic;
              Reset : in  std_logic;
          Scan_Code : out std_logic_vector (7 downto 0);
           Scan_DAV : out std_logic;
           Scan_Err : out std_logic );
  end component;
  signal Gnd,Vcc : std_logic;
----------
 signal a,first,second,third,fourth : std_logic_vector (3 downto 0);
----------
  signal LED     : std_logic;
  --signal count     : integer:=0;
  signal count     : integer:=0;
  signal DoRead  : std_logic;
  signal Code    : std_logic_vector (7 downto 0);
 
 
  begin
  Gnd <= '0';  Vcc <= '1';
  PS2_CTRL_i : PS2_CTRL
    Generic Map ( FILTERSIZE => 8 )
    Port Map ( Clk=>Clk, Reset=>Reset, DoRead=>DoRead,
               PS2_Clk=>PS2_Clk, PS2_Data=>PS2_Data,
               Scan_Code=>Code, Scan_DAV=>DoRead, Scan_Err=>LED );
  -- Note: use Pol=>Gnd if display is active high type.

 process(Code,count,first,second,third,fourth)
begin
   
   case Code is
      when "00010110" =>a<="0001";--1
      when "00011110" =>a<="0010";--2
      when "00100110" =>a<="0011";
      when "00100101" =>a<="0100";
      when "00101110" =>a<="0101";
      when "00110110" =>a<="0110";
      when "00111101" =>a<="0111";--7
      when "00111110" =>a<="1000";
      when "01000110" =>a<="1001";
      when "01000101" =>a<="0000";
      when others=> null;
      
   end case;
        ---------- СДВИГА--------------------------------------------------------
   ----------
        case count is
      when 0 =>
         first<=a;
         count<=count+1;
      when 1 =>
         second<=first;
         first<=a;
         count<=count+1;
      when 2 =>
         third<=second;
         second<=first;
         first<=a;
         count<=count+1;
      when 3 =>
         fourth<=third;
         third<=second;
         second<=first;
         first<=a;
         count<=0;
      when others=> null;
      end case;
      
   ----------
end process;

 
 
   
   Dec7Seg0 : SEVENSEG
     Port Map ( data_in => first, data_out => D7SEG_H );
     Dec7Seg1 : SEVENSEG
     Port Map ( data_in => second,  data_out => D7SEG_L );
     Dec7Seg2 : SEVENSEG
     Port Map ( data_in => third,  data_out => D7SEG_2 );
     Dec7Seg3 : SEVENSEG
     Port Map ( data_in => fourth,  data_out => D7SEG_3 );