Написал, регистр общего назначения для АЛУ, потом дописал переключение контекста при прерывании: при переходе входного сигнала INTA в высокое состояние - значение регистров сохраняется в дополнительном регистре (reg_buff), при спаде сигнала - наоборот, данные из буферного регистра записываются в РОНы.
Код РОН:
Код:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.all;
ENTITY ron IS
PORT
(
clk : IN std_logic;
INTA : IN std_logic;
DATA_IN : IN std_logic_vector (11 DOWNTO 0);
ADR_REG1 : IN std_logic_vector (3 DOWNTO 0);
ADR_REG2 : IN std_logic_vector (3 DOWNTO 0);
WE : IN std_logic;
DATA_OUT1 : OUT std_logic_vector (11 DOWNTO 0);
DATA_OUT2 : OUT std_logic_vector (11 DOWNTO 0)
);
END ron;
ARCHITECTURE arh OF ron IS
type registr is array (0 to 15) of std_logic_vector(11 downto 0);
signal reg : registr;
signal reg_buff : registr;
BEGIN
PROCESS(clk)
BEGIN
IF (clk'event AND clk = '1') THEN
IF (WE = '1') THEN
reg(to_integer(unsigned(ADR_REG2)))<=DATA_IN;
ELSE
DATA_OUT1<=reg(to_integer(unsigned(ADR_REG1)));
DATA_OUT2<=reg(to_integer(unsigned(ADR_REG2)));
END IF;
END IF;
if(rising_edge(INTA)) then
reg_buff<=reg;
end if;
if(FALLING_EDGE(INTA)) then
reg<=reg_buff;
end if;
END PROCESS;
END arh;
Но к моему сожалению переключение не работает, Quartus выдаёт след. ошибки:
Что можно с этим сделать?
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][0] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][1] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][2] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][3] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][4] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][5] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][6] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][7] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][8] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][9] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][10] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[15][11] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][0] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][1] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][2] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][3] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][4] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][5] because its behavior depends on the edges of multiple distinct clocks
Error (10820): Netlist error at ron.vhd(36): can't infer register for reg[14][6] because its behavior depends on the edges of multiple distinct clocks
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