// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: 1000,000 kHz
// Mode: CTC top=OCR1A
// OC1A output: Toggle
// OC1B output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
TCCR1A=(1<<COM1A0);
TCCR1B=(1<<WGM12)|(1<<CS10);
ICR1H=0x00;
ICR1L=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
OCR1A=12;
OCR1B=0x00;
//SPE: SPI Enable
//MSTR: Master
//SPR1, SPR0: fclk/128
SPCR=(1<<SPE)|(1<<MSTR)|(1<<SPR1)|(1<<SPR0);
// USART initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART Receiver: On
// USART Transmitter: On
// USART Mode: Asynchronous
// USART Baud Rate: 2400
UCSRA=0x00;
UCSRB=0x18;
UCSRC=0x86;
UBRRH=0x00;
UBRRL=25;
DDRD=255;
PORTD=0;
DDRB=0b11111111;
PORTB=0b00000000;



