Пипец, до чего дошли...avreal писал(а):Всё, забудьте. R0..R31 в Xmega не адресуются как память, как это было у остальных AVR.
А GPIO -- это другое. Таких регистров по одному-два-три и у свежих "обычных" AVR-ок есть, доступны для in/out и, что приятно, для размещения глобальных битовых флагов под sbi/cbi/sbis/sbic, так как с байтами в ОЗУ AVR8 такого не умеют.
Код: Выделить всё
/*
--------------------------------------------------------------------------
-- - ATxmega128A1.h -
--
-- This file declares the internal register addresses for ATxmega128A1.
--
-- Used with IAR System's iccAVR and aAVR.
--
-- Copyright Atmel Corporation 2008. All rights reserved.
--
--------------------------------------------------------------------------
*/
...
/** @addtogroup adc Analog/Digital Converter
* @{
*/
/// ADC Channel
typedef struct ADC_CH_struct {
register8_t CTRL; ///< Control Register
register8_t MUXCTRL; ///< MUX Control
register8_t INTCTRL; ///< Channel Interrupt Control
register8_t INTFLAGS; ///< Interrupt Flags
WORDREGISTER(RES); ///< Channel Result
register8_t reserved_0x6; ///< reserved
register8_t reserved_0x7; ///< reserved
} ADC_CH_t;
/// Analog-to-Digital Converter
typedef struct ADC_struct {
register8_t CTRLA; ///< Control Register A
register8_t CTRLB; ///< Control Register B
register8_t REFCTRL; ///< Reference Control
register8_t EVCTRL; ///< Event Control
register8_t PRESCALER; ///< Clock Prescaler
register8_t reserved_0x05; ///< reserved
register8_t INTFLAGS; ///< Interrupt Flags
register8_t TEMP; ///< Temporary register
register8_t reserved_0x08; ///< reserved
register8_t reserved_0x09; ///< reserved
register8_t reserved_0x0A; ///< reserved
register8_t reserved_0x0B; ///< reserved
WORDREGISTER(CAL); ///< Calibration Value
register8_t reserved_0x0E; ///< reserved
register8_t reserved_0x0F; ///< reserved
WORDREGISTER(CH0RES); ///< Channel 0 Result
WORDREGISTER(CH1RES); ///< Channel 1 Result
WORDREGISTER(CH2RES); ///< Channel 2 Result
WORDREGISTER(CH3RES); ///< Channel 3 Result
WORDREGISTER(CMP); ///< Compare Value
register8_t reserved_0x1A; ///< reserved
register8_t reserved_0x1B; ///< reserved
register8_t reserved_0x1C; ///< reserved
register8_t reserved_0x1D; ///< reserved
register8_t reserved_0x1E; ///< reserved
register8_t reserved_0x1F; ///< reserved
ADC_CH_t CH0; ///< ADC Channel 0
ADC_CH_t CH1; ///< ADC Channel 1
ADC_CH_t CH2; ///< ADC Channel 2
ADC_CH_t CH3; ///< ADC Channel 3
} ADC_t;
/** @} */