EPwm1Regs.TBPRD = 4000;
    EPwm1Regs.CMPA.bit.CMPA = 2000; // Set 50% fixed duty for EPWM1A
    EPwm1Regs.TBPHS.bit.TBPHS = 0; // Set Phase register to zero
    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module
    EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4; // TBCLK = SYSCLK
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV4;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero
    EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPWM1A
    EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
    EPwm1Regs.DBFED.bit.DBFED = 50; // FED = 50 TBCLKs initially
    EPwm1Regs.DBRED.bit.DBRED = 70; // RED = 70 TBCLKs initially

    EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_PRD;     
    EPwm1Regs.ETSEL.bit.INTEN = 1;               
    EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;     

    // EPWM Module 2 config
    EPwm2Regs.TBPRD =  PERIOD;
    EPwm2Regs.CMPA.bit.CMPA = 500; // Set 50% fixed duty EPWM2A
    EPwm2Regs.CMPB.bit.CMPB = 500; // Set 50% fixed duty EPWM2A
    EPwm2Regs.TBPHS.bit.TBPHS = 0; // Set Phase register to zero initially
    EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
    EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Slave module
    EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
    EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
    EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero
    EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPWM2A
    EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
    EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module
    EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
    EPwm2Regs.DBFED.bit.DBFED = 50; // FED = 50 TBCLKs initially
    EPwm2Regs.DBRED.bit.DBRED = 70; // RED = 70 TBCLKs initially

    EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     
    EPwm2Regs.ETSEL.bit.INTEN = 1;               
    EPwm2Regs.ETPS.bit.INTPRD = ET_1ST;         

    EDIS;